Historical Document · 1974
US Patent 3,819,921: Miniature Electronic Calculator (Kilby, Merryman and Van Tassel)
Texas Instruments' patent on the hand-held electronic calculator, the Cal-Tech: priority 13 May 1971, granted 25 June 1974.
Historical Document · 1974
Texas Instruments' patent on the hand-held electronic calculator, the Cal-Tech: priority 13 May 1971, granted 25 June 1974.
United States Patent Kilby et al. [19] (11) =©3,819,921 [45] June 25, 1974 {54] MINIATURE ELECTRONIC CALCULATOR {75] Inventors: Jack S. Kilby; Jerry D. Merryman; James H. Van Tassel, all of Dallas, Tex. [73] Assignee: Texas Instruments Incorporated, Dallas, Tex. [22] Filed: Dec. 21, 1972 [21] Appl. No.: 317,493 Related U.S. Application Data [63] Continuation of Ser. No. 143,192, May 13, 1971, abandoned, which is a continuation of Ser. No. 671,777, Sept. 29, 1967, abandoned. [52] U.S. CL. . 235/156, 235/159 {51] Int. Cl... G06f 7/38 {58] Field of Search 235/156, 159, 145; 340/365, 347 DD; 219/201 {56] References Cited UNITED STATES PATENTS 2,932,816 4/1960 Stiefel et al. .. 340/347 DD 3,140,031 7/1964 Fitch... 226/109 3,315,069 4/1967 Bohm... 235/156 X 3,331,954 7/1967 Kinzie et al. 235/156 3,354,817 11/1967 Sakurai et al - 101/93 3,405,392 10/1968 Milne et al.. 235/156 X 3,430,226 2/1969 Chow... 340/347 3,509,329 4/1970 Wang et al.. 235/156 3,548,179 12/1970 Kimura et al. 235/156 3,553,445 1/1971 Hernandez 235/156 OTHER PUBLICATIONS National Technical Report, Vol. 12, No. 2, 1966, pp. 129-137, (Published by Matsushita Electric Industrial Co., Ltd., Japan). Primary Examiner—Charles E. Atkinson Assistant Examiner—James F. Gottman Attorney, Agent, or Firm—Harold Levine; Edward Connors, Jr.; John G. Graham [57] ABSTRACT Binary-coded decimal electronic calculator capable of adding, subtracting, multiplying and dividing with some degree of automatic decimal point placement to provide a visual display of answers of up to 12 decimal digits. The decimal digits are serially displayed at a speed compatible with the calculator operations. The parts of the calculator are so adapted electrically and mechanically in relation to each other to result in a minature portable battery operated calculator of ex- tremely small dimensions for example the outside case dimensions of 4% inches by 6% inches by 1% inches and very low weight of about 45 ounces, having a cal- culating capability only before obtainable in calcula- tors of much larger size and weight while retaining mechanical and operational simplicity. Some signifi- cant aspects of the calculator are the primary elec- tronics embodied in an integrated semiconductor cir- cuit array located in substantially one plane for per- forming the arithmetic calculations and generating the control signals, a keyboard input arrangement located in substantially one plane parallel to the integrated semiconductor circuit array for producing unique electrical signals corresponding to number and com- mand entries and a visual display using a semiconduc- tor array, as for a thermal printer for printout. 59 Claims, 36 Drawing Figures 6 K RR RA RO 314 4 KEYBOARD + ti i 7307 { \ _ L PRINT PRINT L—REGISTER Let bens MATRIX HEAD SUM 306 t { NUM PG SUM L | ACCUMULATOR REGISTER J 63L— x 63s— Y + uM co 30! 6 1 63r—| °°? a) SR + Ske SERIAL [_ va + ‘ 637— 4 , ADDER caRRy 305 Li FF Lace CPI 304 303 i i Ly OPERAND REGISTER CRC 62k — 0 x —suB SR3 6l 62z—| Ge we —2ADS G2rR—| } cP2 PATENTED JUN 25 1974 . 3,819,921 SHEET 04 OF 21. JACK $. KILBY, ETAL BY MELVIN. SHARP ATTORNEY 3,819,921 SHEET Oe OF 21 15 18 OMTERTEDUUN25 1878 3,819,921 SHEET 03 OF 21 6 | PATENTED JUK25 1874 3,819,921 SHEET O48 OF 21° } a 3S a = a [Glee 50 + Vet l = 2 5 day] Reze Teal Sle ee | q P= re = = li r= Tos oN lo “1s “Iel] 4 Reis Ress Rew) PL Re a a se FFF [es Tes a I eS ] & | fale Lk RAO a Re . i I i etree ia I 7 = 87 oa B24 era AB | gle Li, = = = Teo THO ia : = Tyo] TW wa ito) Teall |} Tes we Re les) les] Riles} To Ry Redal| ||Reza|| |[Rezal) |/Rezs eo t_0 [A yh OF ye Ne a=! ao | orf) Oe Resd Feps| Roea| | Rees Pea ? a “el ‘es Tas fle a | Te 9 Til Fer L rae 14 ur wa —— ne aE Ee IE Lee ‘ aN ais HAN MESA Reso-| ; ] (3) |} (oy |} fo fa) (of [. |.) ) .) \2\ Fee Yury Vit rose Poey| Rea hay] Roe 46/ Siig, y ad fs 49 7 4-5) {-—--——T ag) SH Bog) {C7 H~~L-93 poo} jo--~"| mesasy HU (K----- | 54 4/ PATENTED Juke 5 is? 3,819,921 SHEET 0S OF 21, PG ° R308 INPUT 300 R293 iw INPUT 290 3,819,921 4 7. i PATENTED suk 25 16 SHEET O& OF 21 70S Ag+ PATENTED Jun 25 1974 SHEET 07 OF 70 21 +3 +15 +15 3,819,921 9 9 @ @ ¢ @ @ o ¢ ¢ © © ¢ 73 al FIG. 18 bis 77~U I Ao the3 7 Hy |} -75 al FIG. I7 FIG. 15 I] 60 ~He79 76—U eeeetcve ae V7 tre - trtnt SRI SR3| SR2 Ti ; sea] / vet y T Tigld 70 RESISTOR 69 3,819,921 PATENTED JUN 25 1974 SHEET 08 OF 21 mals] ri | Ks ray I | | me: cae HSE rai | | l c= S jot S41 £ 3,819,921 PATENTED JUR 25 1976 SHEET 09 OF 21. woeot i 210 of wot! b>, | ose 7 asott— CREF oe ad waka ry wot = = alg el Cama — Taal al Log) foce\ fees) mo alld [ue a —~—S ~_ lao BAaleeale = - ni . i a os as ot 3,819,921 PATENTED JUN 25 1974 SHEET 10 OF 21° ceo J to aa j z al g Fy Uist N ~ ip) a 7k ere reqae 2 fF 8 3 8 6 PATENTED JUN 25 197¢ 3,819,921] SHEET 11 OF 22. Ooze = soon i Sto vas JP. ae — i 1 lf - Or Or Orr ar er i 1s : } qi 1 eto ale \ “AYe 1 IT A Vi ee | SAGR SABA Smad amc | ie ee ee in bh Se eet J L PDD |S =| S=5 “| ! ! | 5 Lo ' 3.819,921 PATENTED JUN 25 1974 SHEET 12 OF 21 ind Ln0 Veey “ATENTED JUN 25 IST 3,819,921 SHEET 13 OF 21 +1.5V TATENTED JUN 25 1874 3.819921 SHEET 14 OF 24 +15V + 3V3. . 48 Rago Ral T43 R LI OUTPUT www fe 6 SHIFT - Igo T46 Taf REGISTER BITS |__ = a Tyg ~ Rag +1.5V + 3V R 50 Sig 3a Teo UTPUT B42 U6 suet . te) LB REGISTER Bits|_ © 42 149 143 T = . or sRey +15V . + 3Vo— Typ oF52 Rag Ras — OUTPUT Reaa » Ue sniet + ig REGISTER BITs|_— = 44 Taq | Ta = "33 Rs3 +15V + 3yV R. 54 Rag Raz 154 OUTPUT R eae LI 6 sHiFt I | +REGISTER BITS — =] 46 146 147 55 +3V ae Lag, 22 "59 R ATE ED JU 25 1974 3,819,921 SHEET 15 OF 21. pail : pe05 pe ple osc CLOCK S-SCALE FF = 3s —tm PC SA PS Ss DECODE GATES [CLS SC — 1 $8C CZO CPR S| TIM S6C f - (3) PRINT J}—™ (1) (2) ADV, SO TRIGGERS) —m| WAIT PRINT PAPER Tai TAPE _ J DPT —Y [ane CST ONE-—SHOT MULTIVIBRATORS Sig 27 3.819.921 aeons 25 1875 PATENTSC ck SHEET 16 OF 21 2d9 x 1 —yz0 é saye—~ 29 |~z29 BF 2 19 cus — Onset 0 —29 i N ou 498 UE ua1Si9ad GNVYadO win f | 1d9 ee . I | eG ABYWD | ygaay a 199 co | qWwiuas 4 ¥ | ies 10 09 i 2s 4 lus aan ¢9 on 1 + r ; —1¢9 00€ wos YaLSIDSY YOLVINWNDDV 5 9d WON | | 90E wns SY} $9 avaH XY LV LNIUd LNIYd 7 y3LSi9ay—1 oA \ J 208 re ee ee | auvOBAaY v big OM Ve YY x t 9 PATENTED Jun 25 1974 3,819,921 SHEET 17 OF 21. 00 9.29 Vl rey oa Loo Let Lif 89 To ri | ! I | ! t eta rt LiPo Co Lea 130 iol «131-132 SPUTTERED Lt SP J Z GAS —~) SS at LIZA AMaAZ <~ S10» Lag: SL oy Tr eet ss o ; age, 00! my oO / - ——] J | Imo a | 4Ndino dndnt PPh oat iT Li | -——" ————- eal | ; —— $6 , W Fa fi LJ INdNI - = —— 7 t ~ andut + |{Gt! = a 96 66 ° i fod SEE | 5 Ud = 7 = LNdNl ES undni } {Ph moo ae = = LNdNI 5 ey ied ]] os Ag+ wai I86 866 £6 a 4. t ie co veey/ AS I+, 099 = CL PRB AS'I+ DX tor S IONS NSA St 3,819,921] Sil SHEET 19 OF 21 PATENTED Jun 25 1974 ql 2! N yy = SS 71 rhe NIN = fo VN LINN Kw I\\NX\N \ I | | N ae NNENENCZ 2 rAl een APA! 12 Z1-I™N ~ \ N iZ t Je SS ell NN bX NIN Wh —! <j ANS NS S S NN | \eee 5 aS x zi | 994, | Sa ee SN NSS) mu N £9 aN Noe 1 £9g XA SSN SS NS N MQ AG 14" PATENTED QUE 25 874. 3,819,921 SHEET 200F 21 Giga KBN—___ er CL nou me STP___r LW : PS ———__ eg SAP $S,RO___ — Lo KCCP___4 \ CPI,CP3 cP? nannnnnn 62k G2K n KBA,(KBS) RC (SC) uw ADD,AS (SUB,AS)___+ 1 CLS u CPI,CP2,CP3 nn TUL ADS 1 G2Z,63S_ sg ; — PRC___t —d Lig 58 3,819,921 NOISIAIG SHEET 21 OF 21 PATENTED JUN 25 1974 aus oe Om etn eae auet . MES GS wee dus une | eae aad tre eee eee eee as og Sencar F oes ogee tue . tee a hat be oes ‘ fet Saab dan 5 fen eat nue se leeadd of NOILICGY — ae . tes ” pee tes ote ” tee e 2 : : — 3,819,921 1 MINIATURE ELECTRONIC CALCULATOR This application is a conitnuation of copending appli- cation Ser. No. 143,192, filed May 13, 1971 (now abandoned), which was a continuation of then- copending application Ser. No. 671,777, filed Sept. 29, 1967 (now abandoned). The present invention relates to electronic caicula- tors and more particularly to miniature portable elec- tronic calculators capable of adding, subtracting, multi- plying and dividing. An object of the present invention is to provide an electronic calculator of a size substantially smaller than heretofore obtainable. Another object of the present invention is to provide a miniature portable electronic calculator having a high degree of calculating capability and mechanical and operational simplicity. A feature of the invention is a miniature electronic calculator having its primary electronics embodied in an integrated semiconductor circuit array located in substantially one plane for performing the arithmetic calculations and generating the control signals. Another feature of the invention is a miniature elec- tronic calculator having a keyboard encoder located in substantially one plane for encoding a mechanical entry into a unique signal and an integrated semicon- ductor circuit array located substantially in one plane parallel to the keyboard encoder for performing the arithmetic calculations and generating the control sig- nals. : Still another feature of the invention is a miniature electronic calculator having an integrated semiconduc- tor circuit array located in substantially one plane for performing the arithmetic calculations and generating the control signals for a thermal printer comprising an integrated semiconductor heater element array. "Other objects, features and advantages of the inven- tion may be best understood by reference to the follow- ing detailed description taken in conjunction with the accompanying drawings in which like reference num- berals indicate like parts and in which: FIG. 1 illustrates the exterior casing of the calculator, according to an embodiment of the present invention, FIG. 2 illustrates the mechanical relationship of the parts of the calculator of FIG. 1, FIG. 3 illustrates the tape advance system 11 and thermal printer 4 for printout in the calculator of FIG. 2; FIG. 4 illustrates the key 23 and keyboard encoder 6 of the calculator of FIG. 2; FIG. 5 illustrates the keyboard encoder 6 of the cal- culator of FIG. 2; FIG, 6 illustrates the thermal printer 4 of the calcula- tor of FIG. 2; FIG. 7 illustrates the heater element array and drive matrix therefor of the thermal printer of FIG. 6; FIG. 8 illustrates the electrical schematic of the "heater element array and drive matrix therefor of the thermal printer of FIG. 6; FIGS. 9-13 illustrate the power supply and auxiliary electronics of the calculator of FIG. 2; FIG. 14 illustrates the integrated semiconductor cir- cuit array comprising the primary electronics 7 of the calculator of FIG. 2; 5 15 20 30 35 40 45 50 55 60 65 2 FIGS. 15-18 illustrate the logic circuitry of the inte- grated semiconductor circuit array of FIG. 14; FIG. 19 illustrates a partial view of the tape advance system 11 of FIG. 2; FIG. 20 illustrates a typical circuit comprising a gate in FIGS. 15-18; FIG. 21 illustrates. a shift register circuit of the inte- grated semiconductor circuit array of FIG. 14; FIG. 22 illustrates a 24 bit shift register of the inte- grated semiconductor circuit array of FIG. 14; FIG. 23 illustrates the interconnection of two 24 bit shift registers of the integrated semiconductor circuit array of FIG. 14; FIG. 24 illustrates one 24 bit shift register of the inte- grated semiconductor circuit array of FIG. 14; FIG. 25 illustrates the clock pulse circuit of a shift register of the integrated semiconductor circuit array of FIG. 14; FIG. 26 illustrates a block diagram of a control sec- tion of the integrated semiconductor circuit array of FIG. 14, FIG. 27 illustrates a block diagram of the print con- trol section of the integrated semiconductor circuit array of FIG. 14, FIG. 28 illustrates a block diagram of the arithmetic section of the integrated semiconductor circuit array of FIG, 14; FIG, 29 illustrates an integrated semiconductor cir- cuit embodying the logic circuits of FIGS. 15-18; FIG. 30 illustrates the gate 90 of FIG. 29; FIG. 31 illustrates a cross section of FIG. 30 taken along the lines A—A; FIG. 32 illustrates an integrated semiconductor shift register of the integrated semiconductor circuit array of FIG. 14; FIG. 33 illustrates a cross section of FIG. 32 taken along the line A—A in FIG. 32; FIGS. 34 and 35 illustrate the timing diagrams of the commands for digit entry, add and subtract operations of the calculator of FIG. 2; and FIG. 36 illustrates the printout tape format. Referring to FIG. 1, there is illustrated the exterior casing 2 of the miniature portable calculator according to an embodiment of the present invention in which the numeric and command entries are made to the calcula- tor by depressing the numeric keys 0-9, the add key +, the subtract key — the multiply key X, the divide key +, the clear kcy C, the error key E, the print key P, and the decimal point key . . The calculator is turned on and off by the switch 5 and the printout is viewed through the magnifying lens window 1. Referring to FIG. 2, the 18 entry keys 0-9, +, —, X, C, E, P, +, and . are mounted in the casing 2 above the keyboard encoder 6 in a manner such that the depres- sion of a key causes the key to communicate with con- ductive strips on the keyboard encoder 6, thereby elec- trically encoding the key depression so that it can be transmitted to the primary electronics 7 mounted below the encoder 6. The encoder key depression is transmitted from encoder 6 to the primary electronics 7 by the electrical connections 3. The printout tape 14 is arranged in a reel 14’ resting on the shelf 10. The printout tape 14 advances from the reel 14’ in a vertical position through the guide block 13, which translates the vertical position to a horizontal position so that the tape 14 can advance past the underside of the thermal printer 4 and past the magnifying lens window 1 for 3,819,921 3 readout of the printed information. Electrical connec- tions 9 provide the electrical communication between the primary electronics 7 and the thermal printer 4. The case 2 is composed of two parts 2’ and 2”’, which may be connected together by hinges and a latch so that part 2' is movable in an upward direction with re- spect to part 2”’ in order to allow access to the interior of the casing 2. The power supply batteries 17 and 18, the module 15 containing the auxilary electronics and the tape advance system 11 are fixed on the floor of the casing 2’. A battery charger plug 16 is also provided in the wall of the bottom casing 2’. The shelf 10 fits within the bottom casing 2’’ and rests on the batteries 17 and 18 and module 15 for support. The cutout 10’ is provided in the shelf 10 in order to expose the tape advance system 11. The tape 14 advances out of the guide block 13 over the resilient pressure pad 19, through the opening 42 and emerges at the exterior of casing 2 through an opening in the side of the casing 2. The physical relationship of the parts is better illus- trated with reference to FIG. 3 in which the tape 14 ad- vances out of the guide block 13 over the pressure pad 19 through an opening 42, the thermal printer 4 being positioned above the pressure pad in a manner that the printing takes place at the underside of the printer 4 above the pressure pad 19. Whereas, the information is printed on the top surface of the paper 14 and is’ viewed from the window 1 to the left of the printer 4. An insulating plexi glass protective cover plate 8 is mounted above the shaft 10 to separate the shelf 10 from the primary electronics 7. Electrical connections are provided between the power supply batteries 17 and 18 and the auxiliary electronics contained in mod- ule 15 on the floor of the bottom casing 2"’ which are in turn electrically connected to the primary electron- ics 7 through wires 12 and on/off switch 5. According to the present invention, the mechanical and electrical parts and their relationship are so adapted with regard to each other so as to provide a very small compact portable calculator of mechanical and operational simplicity and having a high degree of calculating capability which was only before obtainable in calculators of much larger size. For example, accord- ing to the described embodiment of the invention, the outside dimensions of the exterior casing 2 are 4% inches by 6% inches by 1% inches and the calculator weights 45 ounces thereby providing a miniature porta- ble electronic calculator of pocket-size dimensions. The individual parts of the calculator will now be de- scribed so that their relationships may be better under- stood. Keys (23) and Keyboard Encoder (6) The 18 keys provide the means for entering the digits 0-9 and the various commands into the calculator. The depression of a key communicates with the keyboard encoder in the manner to provide a unique electrical signal indicative of the information inscribed on the se- lected key. In this example, the calculator uses the ex- cess 3 binary decimal code and the encoder directly en- codes a key depression into this code. That is, the bi- nary representation of each of the 10 numeric entries is 3 larger than it would be in the conventional binary code. The following Table I illustrates the excess 3 bi- nary decimal code by showing the decimal number entry of a key depression in relation to its binary repre- sentation in the excess 3 binary decimal code. 5 15 20 25 30 35 40 45 60 65 4 TABLE I Decimal Number Binary Representation 0 0011 i 0100 2 o1ot 3 0110 4 oll 5 1000 6 1001 7 1010 8 1011 9 1100 Thus, each numeric key depression results in 4 binary bits as shown above one each at the K 4, K 3, K 2, K 1 output terminals of the keyboard encoder 6 illustrates in FIG. 5. A zero in the code is represented by a short circuit to ground. A 1 is represented by the unshorted state of the terminal. The 4 binary bits representing a decimal number are arranged in the order K4, K3, K2, and K1. Referring to FIG. 4, a key 23 is mounted in the casing 2 which is fixed with respect to the keyboard encoder 6. Located on the encoder 6 are conductive strips 32 so that when the key 23 is depressed, the conductive layer 31 electrically short circuits the conductive strips 32. Referring to FIG. 5 and in the case that the key 23 depressed is a numeric 2 entry, the four conductive strips 32 associated with the number 2 are short cir- cuited resulting in the terminals KBN, K4, K2, and COM being short circuited to provide the desired en- coded entry into the calculator. The COM conductive strip is the ground connection. Consequently, the K4 terminal is shorted to ground and represents zero in the binary code, the K3 terminal is not shorted to ground and represents 1 in the binary code, terminal K2 is shorted to ground and represents zero in the binary code and terminal K1 is not shorted to ground and represents 1 in the binary code. The KBN, K4, K2, and COM commands will then be transmitted to the primary electronics 7. In like man- ner, the other key entries will be encoded by the en- coder 6 and transmitted to the primary electronics 7. The casing 2 is provided with holes respectively ac- commodating the keys. Referring to FIG. 4, the hole in the casing 2 comprises two sections, the top section having a smaller diameter than the bottom section. The bearing 33 is secured within the smaller diameter sec- tion of the hole in casing 2 and extends above the cas- ing 2. The key shaft 26 is movably positioned within a central opening in the bearing 33. Affixed to the key shaft 26 is the key shaft head 24 which provides a con- venient surface on which is affixed the key cap 25. A helix spring 27 is positioned between the key shaft head 24 and the casing 2.to provide upward biasing on the cap 24 so that when the pressure is released, the key re- turns to its normal position leaving the conductors 32 unshorted. Affixed to shaft base 29 is a resilient pad 30 having a thin gold plated copper strip 31. Guide pins 28 are fixed in anchor holes in the casing 2 and slidably mounted in openings in the cap 25. The guide pins 28 prevent rotational movement of the key shaft 26, FIG. 5 illustrates the keyboard encoder 6 which com- prises an insulating substrate on which is located the illustrated pattern of conductive strips. The symbols 0-9, C, E, P,+,., X, —, and + correspond to the like 3,819,921 5 symbols on the caps of the keys shown in FIG. 2 in the manner that the numeric 2 entry of key 23, for exam- ple, shorts out the group of conductive strips 32 asso- ciated with the 2 in FIG. 5. The keyboard encoder 6 accomplishes in substan- tially one plane the generation of unique electrical sig- nals at its output terminals corresponding to the se- lected information inscribed on the caps of the keys. The following Table Il illustrates the relationship be- tween a key depression and the shorted output termi- nals of the keyboard encoder 6 of FIG. 5. TABLE Ii Key Depressed Terminals Shorted KBN, K4, K3, COM KBN, K4, K2, Kl, COM KBN, K4, K2, COM KBN, K4, K1,.COM KBN, K4, COM KBN, K3, K2, K1, COM KBN, K3, K2, COM KBN, K3, K1, COM KBN, K3, COM KBN, K2, Kl, COM KOP, KOP, —, COM KOP, +, COM COM x, COM + 1X FAM Cordsnauncs A detailed description of the keys and keyboard en- 3 coder is found in copending U.S. patent application Ser. No. 671,805, filed Sept. 29, 1967,.abandoned and refiled Nov. 12, 1970 as. continuation application Ser. No. 089,016, now U.S. Pat. No. 3,696,411, entitled Keyboard Encoder filed by Jack S. Kilby and James H. VanTassel and assigned to the assignee of the present application. Said copending application by Jack K. Kilby and James H. VanTassel is incorporated herein by reference. Thermal Printer.4 The thermal printer 4 comprises a 3 X 5 array of inte- grated semiconductor heater elements.located in ther- mal communication with the tape 14 which is thermally sensitive material that changes color upon the applica- tion of heat thereto. The thermally sensitive tape 14 may be the commercially available paper marketed under the trade name “Thermofax” by Minnesota Min- ning and Manufacturing Company. FIG. 6 illustrates a 3 X 5 array of means located within the window 50 in a semiconductor wafer 48. Each heater element of the 3 X 5 array comprises a monocrystalline semiconductor body in a mesa shape and contains a heater element formed therein at the side of the mesa adjacent the larger insulating support 49 so that when the heater ele- ment is energized a ‘thot spot” is formed at the surface of mesa to provide a localized dot on the thermally sen- sitive material 14. A group of selectively energized heater elements forms a.group of dots on the thermally sensitive material ‘14 thereby defining a numeric char- acter 0-9 or symbols C, E, P, ., +, X, — + which is printed on ‘the thermally sensitive material 14. The mesas comprising the heater element array are air- isolated from each other and joined by a metallic con- necting pattern located between the mesas and the in- sulating support 49 which pattern interconnects the heater elements in the mesas in the desired circuit con- 5 10 20 25 35 40 45 50 55 60 65 6 figuration. A drive matrix for selectively energizing the heater elements and supplying the desired power to them is located in the semiconductor wafer 48 in the area generally designated 51. The circuit elements forming the drive matrix are integral within the semi- conductor wafer 48, PN junction isolated from one an- other and interconnected in the desired configuration by a metallic connecting pattern between the semicon- ductor wafter 48 and the insulating support 49. The heating element array and the drive matrix are also in- terconnected in the desired circuit configuration by the metallic connecting pattern between the semiconduc- tor wafer 48 and the insulating support 49. The surface of the printer 4 illustrated in FIG. 6 corresponds to the bottom surface of the printer 4 illustrated in FIG. 3. That is, the surface of the printer 4 illustrated in FIG. 6 is adjacent the surface of the thermally sensitive ma- terial 14 and the thermally sensitive material 14 is in direct contact with the surface of the semiconductor wafer 48 illustrated in FIG. 6. Referring to FIG. 6, 52, 53 and 54 are openings in the insulating support 49 so that external connections can be made to the heater element array and drive matrix from the surface of the insulating support 49 which is remote from the semiconductor wafer 48. These open- ings 52-54 are aligned with bonding pads on the metal- lic connecting pattern between the semiconductor wafer 48 and the insulating support 49. A conductive pattern is applied onto the surface of the insulating sup- © port 49 which is remote from the semiconductor wafer 48, Electrical connections are made to this conductive pattern and to the primary electronics 7 by way of the electrical connections 9 illustrated in FIG, 2. FIG. 7 illustrates the semiconductor wafer 48 in an intermediate stage of its manufacture in order to show the layout of circuit elements formed in the semicon- ductor wafer 48 by utilizing the planar process which circuit elements comprise the heater element array and the drive matrix therefor. Referring to FIG. 7, a 3 X 5 array of transistor- resistor pairs is formed on the surface of the P-type semiconductor wafer 48 in the area designated 50 which corresponds to the area of the window 50 in FIG. 6. The heater element array comprises the diffused transistor-resistors pairs, i.e. triple diffused NPN tran- sistors Tl through T15 and their respective N-type dif- fused resistors R 1 through R 15. Each resistor R1 through R 15 has one of its ends integral with the col- lector of its respective transistor in the manner that the resistor is ohmically connected to the collector of its corresponding transistor internally of the semiconduc- tor material. The drive matrix for the heater element array comprises 15 triple diffused NPN transistors T 16 through T 30 and their respective diffused N-type col- lector resistors Reig through Rego having one of their ends integral with the collectors and ohmically con- nected therewith internally of the semiconductor mate- rial. The drive matrix also includes 15 diffused P-type base resistors and 15 diffused P-type emitter resistors associated with the 15 transistors T 16 through T 30. Each P-type base and emitter resistor is surrounded by an 'N type isolating region whereby the insulating PN junctions isolate it from the other circuit elements and from one another. Diffused N-type conductive tunnels Ta, through Ty,;.are provided in the surface of the semiconductor wafer 48 to allow interconnection be- tween the base electrodes of the transistors T 1 through 3,819,921 7 T 15 and the emitter electrodes of the transistors T 16 through T 30. Diffused N-type conductive tunnel V¢ is provided in the surface of the semiconductor wafer 48 in order to interconnect the free end of the resistors R 1 through R 15 and the common terminal V¢, of the resistors Rea: through Rego. Three diffused N-type conductive tunnels PG are provided in the surface of the semiconductor wafer 48 to respectively interconnect one end of the base resistors Rgig through Rgzo, Raz, Rees and Rapes through Rggo. One end of the three tunnels PG will be interconnected by a metallic strip to provide a common terminal PG. A metallic connecting pattern is placed on an insulating layer on the surface of the semicon- ductor wafer 48 of FIG. 7 in order to connect the cir- cuit elements in the desired circuit arrangement which is illustrated in FIG. 8. The printer 4 comprises 15 mesas and associated drive circuitry and two of the mesas and their associated drive circuitry are illus- trated in FIG. 8 for simplicity. The printer 4 therefore comprises 15 inputs for selectively energizing the 3 x 5 heater element array, a ground input, a collector volt- age biasing input Vc (+ 3 volts) and the PG input. The PG input is the print command and allows the heater element array to be selectively energized. Referring to FIG. 8, two of the 15 inputs are shown as input 29 and input 30 which are respectively con- nected to the base electrodes of the drive transistors T 29 and T 30. The PG input is connected to each of the base electrodes of the drive transistors T 30, T 29 re- spectively by way of the base resistors Rago, Rage in a manner that, when positive pulses concurrently appear at terminals PG and one of the input terminals for ex- ample input 30 the selected drive transistor in this case T 30 is energized and triggers the transistor T 15 in the selected mesa. Accordingly when positive pulses con- currently appear at a terminal PG and terminal input 30, the transistor T 30 is triggered on thereby raising the voltage at its emitter to cause the transistor T 15 to trigger on and draw current through the resistor R 15 thereby causing the hot spot. The concurrent appear- ance of a positive pulse at terminal PG and at a group of input terminals causes a selected group of mesas to be heated and print out the desired character or sym- bol. A detailed description of the thermal printer is found in copending U.S. patent application Ser. No. 671,821, now U.S. Pat. No 3,501,615 entitled ‘Integrated Heater Element Array and Drive Matrix by Merryman et al., filed Sept. 29, 1967 and assigned to the assignee of the present application (U.S. Pat. Nos. 3,571,917 and 3,601,669 also issued from Ser. No. 671,821 by di- visional applications filed May 7, 1969). Said U.S. Pat. No. 3,501,615 by Merryman et al is incorporated herein by reference. Tape Advance System 11 The tape advance system 11 advances the tape 14 to a new position a predetermined time after a number or symbol is printed on the tape 14 in response to-an elec- trical command signal. Referring to FIG. 2, the tape ad- vance system 11 comprises support frame 45 secured to the bottom casing 2'’, magnetic coil 35 secured in the support frame 45, the pole piece 46 secured within a central opening in the coil 35 and having one end se- cured to the magnetic.coil 35 so that the pole piece 46 firmly secures the magnetic coil 35 in the support 10 15 20 25 30 35 40 45 50 55 60 65 8 frame 45, and upper frame member 20 on which is se- cured the plate 44, having the resilient pressure pad 19. The tape 14 passes over and in contact with the resil- ient pressure pad 19 and then through the opening 42. Tha tape advance system 11 is illustrated in FIG. 3 without the support frame 45 for simplicity. Referring to FIG. 3, the pole piece 46 illustrated in FIG. 2 has its end secured to the end section 34, which has a larger diameter than the central opening in the coil 35, The clapper 36 comprised of ferro-magnetic material is pivoted at the point 37 which is fixed to the support frame 45 so that when the magnetic coil 35 is actuated in response to an electrical signal, a magnetic field is created which attracts the clapper 36 and pulls it toward and against the end section 34, Clutch 40 is pivotally mounted on the clapper 36 at point 43. Clutch spring 39 is'secured to the clapper 36 at point 41 and contacts the clutch 40 to bias it toward clapper 36. The parts 36, 40, and 39 of FIG. 3 are illustrated in their normal position. That is, the magnetic coil 35 is unactu- ated. When an electrical signal is applied to coil 35 in order to actuate it, a magnetic field is created attracting clapper 36 toward end section 34. The abrupt move- ment of clapper 36 causes clutch 40 to be thrust away from clapper 36 and out of contact with the tape 14 as the clapper 36 pivots. When the clapper 36 stops against end section 34, the momentum of the clutch and the force exerted by the clutch spring 39 force the edge of clutch 40 into contact with tape 14. The tape 14 is thus gripped between the clutch 40 and the clutch plate 38. The magnetic field created by the coil 35 is sufficient to move the clapper 36 toward the end sec- tion 34 against the biasing of drive spring 22. When the electrical signal applied to the coil 35 is removed and the magnetic field collapses, the drive spring 22 pushes the clapper 36 away from the end section 34 and the tape 14 gripped between the clutch 40 and the clutch plate 38 is advanced in the direction of the arrow by an amount proportional to the clapper stroke, that is, the extent to which the clapper 36 moves away from the end section 34. The speed with which the magnetic field collapses when the electrical signal applied to coil 35 is removed causes the clapper 36 to abruptly thrust forward in the direction of the arrow under the pres- sure of spring 22. Consequently, the tape 14 is quickly advanced forward in a stepwise fashion in response to electrical signals applied to the coil 35. FIG, 19 illustrates the drive spring 22 mounted within a lengthwise hole 21 in the upper frame member 20. Whereas, the spring 22 contacts the clapper 36 during the normal position of the tape advance system and is depressed inwardly of the past.20 when the coil 35 is activated and the clapper attracted. A screw can be provided in a larger hole in the clapper 36 extending into the upper frame 20 so that the clapper stroke mov- ing away from the end section 34 will be limited or stopped at a predetermined stroke distance. The coil 35 will comprise two terminals for the electrical input signal, one being grounded. The guide block 13, thermal printer 4, lens window 1, plate 44, opening 42, and tape 14 are illustrated in FIG. 3 in their relative physical positions to illustrate their mechanical arrangement within the calculator. A detailed description of the tape advance system 11 is found in copending U.S. patent application Ser. No. 671,804, now U.S. Pat. No. 3,520,459 entitled “Tape Advance System” by John McCrady filed on even date 3,819,921 9 herewith and assigned to the assignee of the present ap- plication. Said U.S. patent application by John McCrady is incorporated herein by reference. Power Supply (17, 18) and Auxiliary Electronics (Module 15) . The power supply comprises three 1% volt batteries 17 connected in series as illustrated in FIG. 2 to pro- vide the 4% volt power source illustrated in FIG. 13 and eight 1% volt batteries 18 connected in series as il- lustrated in FIG. 2 to provide the 12 volt power source illustrated in FIG. 13. Referring to FIG. 13, the 4, 5 volt power source is connected to the auxiliary electronics module 15 and through the switch 5 corresponding to switch § illustrated in FIGS. L and 2 to the primary electronics 7, which will be described later. The auxiliary electronics module 15 contains the cir- cuit components and their interconnections as is illus- trated in FIGS. 9-12. Referring of FIG. 9, the terminal marked +3 volts is connected to the +3 volt terminal illustrated in FIG. 13, and the terminals marked OS 1, OS 2, OS 3, OS 4, OS 5, OS 6, OS 7, PG, PG T, and ADV are connected to the similarly marked terminals of the primary electronics.7 through the connection 12 of FIG. 2 as will be described later. Referring to FIG. 10, the terminal marked +12 volts is connected to the +12 volt terminal of FIG. 13, the terminal marked SOL is connected to the magnetic coil or solenoid 35 of the tape advance system 11 illustrated in FIGS. 2 and 3, and the terminal marked ADV is connected to a simi- larly marked terminal of the primary electronics 7 as will be described later. Referring to FIG. 11, the termi- nals marked E 1 and E 2 are connected to similarly marked terminals of the primary electronics 7 as will be described later. Referring to FIG. 12, the terminal —1.5 volts is connected to the 4.5 volt power source illus- trated in FIG. 13 wherein the diodes D 11 and D 12 of FIG. 12 are also illustrated. The interconnected circuit elements of FIG. 9 supply the R-C time delay networks for three one-shot multivi- brators used in the printing sequence to be described later. The circuit of FIG. 10 provides a buffer for re- ceiving the command ADV from the primary electron- ics and converting it into the appropriate voltage SOL for application to the magnetic coil 35. Primary Electronics 7 The primary electronics of the calculator is embod- ied in an integrated semiconductor circuit array lo- cated in substantially one plane. The integrated semi- conductor circuit array comprises the control and arithmetic sections of the calculator for performing the arithmetic operations of the numbers entered into the calculator and generating the control and timing signals for appropriately carrying out the arithmetic opera- tions, the printout of the entry data and answers and the advancement of the tape. The integrated semicon- ductor circuit array is mounted parallel with the key- board encoder 6 so that they occupy generally parallel planes one above the other in a manner that the entry encoding and control and arithmetic operations of the calculator are accomplished in a very smail compact space. The various key entries are made, electrically en- coded by the keyboard encoder 6 and transmitted to the integrated semincoductor circuit array where the various arithmetic calculations are made and control 15 20 25 30 35 40 45 50 60 65 10 signals generated for appropriately commanding the thermal printer '4 and the tape advance system 11. The integrated seminconductor circuit array is illus- trated in FIG. 14 and comprises four integrated semi- conductor circuits placed in the areas designated 73-75, three integrated semiconductor shift registers SR 1, SR 2, and SR 3 and two resistors 69, 70 all inter- connected and arranged on the insulating substrate 7' in the manner to be described. FIG. 15 illustrates a logic diagram having 151 func- tional unit NAND gates interconnected in the manner illustrated and embodied in the integrated semiconduc- tor circuit whose substrate is mounted in the area desig- nated 75 in FIG. 14, FIG. 16 illustrates a logic diagram having 132 functional unit NAND gates interconnected in the manner illustrated and embodied in an integrated semiconductor circuit whose substrate is mounted in the area designated 74 in FIG. 14. FIG. 17 illustrates a logic diagram having 135 functional unit NAND gates interconnected in the manner whose substrate is mounted in the area designated 72 in FIG. 14. FIG. 18 illustrates a logic diagram having 116 functional unit NAND gates interconnected in the manner illustrated and embodied in an integrated semiconductor circuit whose substrate is mounted in the area designated 73 in FIG. 14. Each NAND gate of FIGS, 15-18 is identically con- structed and comprises the circuit illustrated in FIG. 20. The NAND gate contains 6 PNP transistors, 2 NPN transistors, and 2 resistors interconnected in the man- ner illustrated in FIG. 20 with 6 input terminals, a ground terminal and a collector voltage terminal +3 volts, Transistor T 35 has its collector and base elec- trodes short circuited and acts as a PN junction diode connected between resistor R 33 and the base of tran- sistor T 34; the emitters of the PNP transistors are con- nected to the base of transistor T 35 and their collec- tors are connected to ground, so that when a zero or ground appears at any of the input terminals, a PNP transistor is conducting and transistor T 35 is reversed biased, causing transistor T 34 to be off and the output terminal, to be in the high, or one, state. Whéa ones, or positive voltages appear at all the input terminals, the reverse bias is removed from transistor T 35, which turns transistor T 34 on drawing current through resis- tor R 33A which causes the output terminal to be in the low or zero state. Not all of the input terminals of the circuit of FIG. 20 are used by all of the gates of FIGS. 15-18 and only those input terminals which are us