Datasheet · 1971
Rockwell's 1971 catalogue of MOS-LSI building-block circuits for calculators, from the period of the four-chip sets in the Sharp QT-8D and EL-8.
This document invelves CONFIDENTIAL proprietary desian rights of North American Rockwell Corporation, and all desiqns, manufacturing, f PREPARED BY fri : NUMBER i CODE IDENT. NO.: 34576 - joasorr1 M.A. Ebertin fC : TYPE z - oe 4 North American Rockwell ss sas APPROVALS . Microclstiranios Cornputty Preliminary Description ES DATE January 13, 1971 SUPERSEDES SPEC. DATED: None ; caleba PAGE lof 12 NRMEC MOS/LSI- STANDARD BJILDING: - BLOCK CIRCUITS FOR CALCULATORS a . Vice President, “Engineering « Microelectronics Company \ reproduction, use, and sole rights regarding the seme are expressly - reserved. Itois subeitcd urder a confidestial relationshia for a specified parpese, and te reorient, by accepting this decument essumos custdy and. conte! and sarces fa) that this document will not be ccpied or reproduced in wiacle or in part, nor it contents revealed in eny manner or lo any person except to mes the pur pose for which & wes delivered, and ‘bi that ary ‘special features peculiar to this design will net be incor ported an other prejecis. snr aenes A _(NRMEC, 1971). 10332P11 | NRMEC APPLICATION NOTES 7 TYPICAL MOS/LSI STANDARD BUILDING-BLOCK CIRCUITS : FOR . CALCULATORS AND OTHER REAL-TIME DATA REDUCTION SYSTEMS 1. Scope 1.1 NRMEC has available for immediate application families of "standard" MOS/LSI (metal-oxide-semiconductor/large-scale-integrated) circuit chips, designed to pro- vide logic and memory functions for calculators and other real-time data reduction equipment. ; - ‘1.2 Within NRMEC's fanilies of MOS/LSI circuit chips, the "standards" have been organized as "building blocks" for repetitive use in a number of equipment models mecting widely varying specifications. ~ : 1.3 These application notes cover a typical family of standards -- those for imple- menting a variety of calculator configurations. The notes are intended to give equipment designers an insight into the design potentials of NRMEC's building-block approach. 2. Reference: Pub. No. P71-10/701 Introduction to MOS/LSI Technology 8. Circuit Terminology 3.1 General The particular group of circuit chips described in these notes as being a typical _ NRMEC family of MOS/LSI standards form a set of modular building blocks for mechanizing calculator systems. The combination of chips selected to implement a system can be varied in type, quantity, and organization:to construct calculators both conventional and programmable, and of any operational complexity required. 3.2 The Four Calculator Standards 3.2.1 Four MOS/LSI circuit chips comprise the set of NRMEC calculator standards. 3.2.1.1 "C' Chip: master control over other circuit chips in the set. 3.2.1.2 "A" Chip: performs decimal.calculations. 3.2.1.3 "TIT" Chip: contains arithmetic and memory registers. $.2.1.4 "S" Chip: contains (1) logic for an auxiliary Z register, exponents, and binary logic; and (2) an exponent register and a,master time-base eenerator. ; 8 ¢ g North American Rockwell Corpor reproduction, use, and sale rights regarding the same parelinn. ao 4 a ls document involves CONFIDENTIAL proprietary design rights of ation, and all designs, manufacturing, ! ’ are express| 2 reserved. It is submitted under a confidential relationship for : specified purpose, and the recipient, by accepting this document assumes custcdy and control and agrees (a) that this document will not be copied or rerroduced in whole or in part, nor it contents revealed in any manner or 10 any person excep! to meet tho pur- pose for which it was delivered, and (b) that any special features *sabng 2B ee so-oone, two, or three, depending upon the complexity of the input/output interfaces -- are ... either added from NRMEC's standard MOS/LSI product line or are custom-designed 10332P11 en. “9Be2/2° Circuit chips in a given standard set are completely interchangeable with those so wee in other sets or with corresponding spare circuit chips. Handpicking of parts is not required. Equipment containing replacc:nent devices will function precisely according *.. to original specifications. 5 . 3.2.3 A variety of mounting methods are available: PCB, multilayer board, ceramic substrate, etc. ».3.3 To complete a calculator configuration mechanized with C, A, T, andS chips, a ~ . NRMEC standard MOS ROM (read-only memory), custom-ceded to implement unique tae "ustomer requirements, is included in the configuration. Interfacing logic chips -- ',. to customer specifications. Only power supplies and peripheral input/output equip- . ment (displays, keyboards, typewriters, tape recorders and playback units, etc.) then, are required to round out the system. cig : ‘ ~ -4,.. Basic Features 4. 1 Word Length In calculators formed from NRMEC standard calculator chips, all memory and operand registers are 20 digits long. Two discretes (inputs) set the timing to cause the machine to manipulate operands of length 10, 12, 14, or 16 decimal digits. 4. 2 Decimal Point Modes 4.2.1 A machine made up of the standard chips may operate in either a fixed decimal point mode and/or a floating decimal point mode. In the floating-point mode, the ' + machine operates on any number within the specified range of the calculator. It normalizes the result to allow the highest number of significant digits to be displayed and/or printed. Leading and trailing zeroes can be handled in various ways, depend- ing on how the machine is programmed. . 4.2.2 When the machine is operating in the fixed-point mode, the decimal point can ' be set manually over the range of values indicated in Table 1. All results may be displayed or printed as specified by the selected decimal setting. Other manners of outputting the results can be microprogrammed into the ROM. Table 1. Range of Decimal Point Settings . Operand Length (Decimal Digits) Point Setting Range 10 : From 0 to 10 120 From 0 to 12 14 wu « From 0 to 14 16 - From 0 to 15 This document! involves. CONFIDENTIAL proprietary design rights of 4 North American Rockwell Corporation, and all designs, manufacturing, reproduction, use, and sale tights regarding the same are expressly 3 reserved. I! is submitted under a confidential relationship for a specified purpose, and the recipient, by accepting this document assumes cuslcdy and control and agrees (a) that this document will not be ccpicd or reproduced in whele or in part, nor it contents. revealed in any manner or to any person except lo meet the pur- pose for which it was delivered, and (b) that any special features J 2ca'h. ¢ tse Be ed 1S aot 7 . ‘ BAS Resestk TES, A. Pes ws Si 10332P11 4.3 Rounding or Truncation | ; : | . : With the machine operating in either fixed-point or floating-point mode, the ROM can be programmed to: i's °. S ane eee ‘ a 4.3.1 Allow cither manual or automatic roundoff of results 4.3.2 Allow cither manual or automatic truncation of a result 4.4 Automatic Clear With Power Turn-On The necessary logic is' provided by the standard chips for initializing the calculator after power turn-on. In effect the power-on condition clears certain registers and can be used to set necessary conditions so that the machine is initialized to a speci- fied state. ae , . 4.5 Multiple Memories 4.5.1 Multiple independent memories (as many as four) can be included in the calcu- lator configuration to store cumulative totals or data constants while calculations are performed. The functions in which a particular memory register takes part are under ROM control and may vary from configuration to configuration -- i.e. , a - particular memory may be selected for use in chaining operations to hold a constant "divisor" or a multiplier, etc. : . 4.5.2 The term "chaining" refers to a sequence of similar (of equal precedence) operations, where "similar" is used to pair (1) multiply and divide operations or (2) add or subtract operations. In chaining, the result of the preceding operation may be used as input for the next operation, without the necessity for re-entering the. result. Three types of chaining sequences are shown in Figure 1, where A, B, C, . and D represent decimal numbers. 4.6 Constant Calculations Cs ee 3 4.6.1 In certain calculations it may be corivenient to: ~~~ 1 4.6.1.1 Multiply many numbers by the same multiplier . i ? ‘aie * 4.6.1.2 Divide many numbers by the same divisor 4.6. 4. 3 Divide the same number by many divisors 4.6.2 The ROM can be programmed to permit such operations to be performed ' conveniently. The operations may make use of one or more of the memories that are included in the calculator configuration. Examples of the operations are shown in Figure 2. , Bale” . This document involves CONFIDENTIAL proprietary design sda of | ‘ North American Rockwell Corporation, and all designs, manu a reproduction, use, and sale rights regarding the same are ances y reserved, It is submiited under a confidential relationship or a specified purpose, and the recipient, by accepting this document : assumes cuslody and control and agrees (a) that this ducument 4 will not be copied or reproduced in whele or in part, nor it ace . revealed in any manner cr ty any person: excep! to meet ie pur- pose for which it was delivered, and (b) that any special features peculiar to this design_wii! not be incorporated in other projects. Bein) 2 10332P11 | \ | CASE | _ ae, | TRESULT. |RESULT , DEPRESS DEPRESS DEPRESS EN‘ER A oe ENTER B/—> >| A* : — EN'‘VER / l* KEY _ tI ° KEY. A*B |b] ENTER C}—-> = KEY. 1 A*DC “CASE 2! . . ‘ ~ {RESULT 'RESULT oe DEPRESS DEPRESS DEPRESS 3 4a "RESULT (RESULT ENTER DEPRESS ENTER DEPRESS| _ ENTER DEPRESS nt 1 $4 - aii {> a AIP] + key. Bp pee PP neo Pl a kee Popes aes ie RESULT . oh} ENTER DEPRESS peinieaes see Dt + KEY foie: Figure 1. Chaining Operations This document involves CONFIDENTIAL ‘proprietary design rights of North American Rockwell Corporation, and all designs, manufacturing teproduction, use, and sale rights regarding the same are expressly reserved. It is submitted under a confidential relationship for a specified purpeso, and the recipient, by accesting this documeat assumes custedy and control and agrecs (a) that this document will not be copied or reproduced in whelo or in part, nor il contents revealed in any manner or to any person except to meet the pur- pose for which it was delivered, and (b) that any special features peculiar to this design will not be incorporated in other projects. 0332P11 H ! CASE 1, CONSTANT DIVISOR ey a [n us — | RESULT : 'RESULT DEPRESS DEPRESS] | - DEPRESS > cian s| A/B bel ENTER C L—4 t -C/B : [¢ CASE 2, CONSTANT MULTIPLIER — Sch hee Poe ENTER: | -_ | DEPRESS ENTER | | | DEPRESS - ENTER DEPRESS = i bp |—tp » Lp A*B ~ fe} ARC ee. ® KEY _ — = KEY A acl Cae ee ‘ E ‘ (CASE 8, CONSTANT DIVIDEND al et ae ree ‘RESULT [RESULT ENTER DEPRESS ENTER DEPRESS i “ENTER DEPRESS ™ : a ne . Pe Po 2 A Cc A : KEY_ BLL = KEY _ oe Cw. =KeY [ ~ cS aH REET Eh es \ | Figure 2, Constant Calculation Operations This document Involves CONFIDENTIAL proprietary design rights of, North American Rockwell Corporation, and alf designs, manufacturing, reproduction, use, and sale rights regarding the same are expressly reserved. It is submitted under a confic'ential relationship for = Specified purpose, and the recipient, by accepting this document assumes custcdy and conliol and agrees (a) drat this docurmen: will not be cepied or reproduced in whole or in part, nor it coneats revealed in any manner or to any person except to meet the pur- pose for which it was’ delivered, and (b) that any special features peculiar to this design will not be incorporated in other projects. L0S5er1i1 4.7 Internal Clock Generation Because the S chip contains an internal clock, the calculator formed from the standard chips requires no external clocking. If it is desired, however, the standard-chip calculator can operate on external clock signals of the appropriate duration and timing. Synchronization of input/output to the keyboard, displays, and/or other peripheral ‘ jnput/output equipment is accomplished in the custom interface. 5. Arithmetic Capabilities - 5.1 Calculators formed from NRMEC standard ealéatdine chips are capable of per- forming all operations on operands and yicld results which have the algebraically correct sign and magnitude. 5.2 The basic set of eperations includes: 5.2.1 Addition 7 5. 2.2 Subtraction .5.2.3 Multiplication | 5.2.4 Division : | Rite meee ne cre | re Wer : 5.2.5 Square root calculation | | 3 6.2.6 Percentage calculation 5.2.7 Various combinations of operations 5.2.1 through 5.2.6. 5.3 The routines to perform operations 5.2.1 through 5.2.7, and'to handle normal input/output are microprogrammed into a ROM. 5.4 If expanded capabilities (additional functions) are required, a second ROM can be used to mechanize them. Such functions might include, for example: 5.4.1 Trigonometric functions "his documont involves CONFIDENTIAL proprietary design rights of North American Rockwell Corporation, and all designs, manufacturing, 5.4.2 Exponentiation reproduction, use, and sale rights regarding the same are expressly reserved. Ii is submiited under a confidential relalionship for a specificd purpose, and the recipient, by accepting this document 5.4.3 Averaging assumes cusicdy and conircl and agrees (a) that this document ia . t ; will not be copied or reproduced in whole or in part, nor if contents 5.4.4 Standard deviation calculation revealed in any manner or fo any person excep! to meet the pur- pose for which it was delivered, and (b) that any’ special features 6. Programmable Calculator . 6.1 With the addition of only two more chips -- a program-control chip and a pro- gram ROM chio -- programmability can be included as a feature of the standard-chip calculator. ‘This feature: . rn 6.1.1 Allows a stored program of 200 steps to be entered into the machine. (The length can be increased in blocks of 200 steps, up to a maximum of 1,000 steps, by adding one shift register chip for each 200-step increment. 7 peculiar to this design will not be incorporated in other projects. LU09LFIlL a ee 6.1.2 Provides for either single-step or automatic sequencing of program steps. 6.1.3 Allows normal keyboard mode operation. 6.1.4 Provides subroutine generation with two levels of program returns. a The Four Calcuwiator Chips -- C, A, T, § 7.1. The C. Chip 5 ee... The c chip serves as a master control over other chips in the standard calcu- lator chip set. Although only 150 by 150 mils in size, the C ene implements 240 logical equations. 7.1.2 The C chip contains status registers which are used to indicate such conditions as those in which the calculator is in an "add" state, has overflowed, or has an error. 7.1.3 The C chip senses che status of selected registers, the status of flip-flops or discretes as selected by a ROM address, and the status of keyboard inputs such as the decimal pointing. Using this infor mation, the C chip generates output commands to ‘coordinate the activities of the other standard calculator chips. 9.2 The A Chip tails? a ee, vera) ei 7.2.1 The 160-mil-square A chip performs decimal calculations. Included on the A ‘chip is circuitry for input/output logic control of the data entered into the various registers. The chip implements 250 logical equations. 7.2.2 Specifically, the A chip contains: a serial decimal adder, a ROM address register, a two-level stack for return address storage, register status-determining . logic, X and Y register storage and shift logic, and operand inter-register transfer logic. i 7.3 TheT Chip + 7.3.1 The T chip contains the arithmetic registers and the memory registers. It implements 200 equations and measures approximately 150 by 160 mils in size. 7.3.2 The T chip provides: 7.3.2.1 Storage for four numbers (of length 10, 12, 14, or 16 decimal digits, depending upon the model) in four.memory registers. 7.3; 2.2 Storage for values (exponents) which indicate the decimal point setting of the four memory registers. ' 7.3.2.3 Three 73-bit registers for operands X, Y, and 2. 7. 3.2.4 Interfacing rpha to a keyboard. 4 7.3.2.5 An output. signal to indicate the maximuypelgesmah POMLSEANAB RARPESEIPIS dation vights' on the model. North American Rockwell Corporation, and all designs, manulacturin toproduction, use, and sale rights regarding the same are express reserved. It is submitted under a confidential relationship for specified purpose, and vie recipient, by accepting this documer assumes custody and control and agrees (a) that this documer will not be copied er.seoroduced in whole or in part, nor il cue a revealed in any manner or lo any person except to mes! te ox. pose for which it was delivered, and (bh) ie any toed! “eM e cacssdiicw @a 6t3 1 ons 4 «x-¢ LG aa 3. hs © on. ic. Paree reproduction, use, and sale rights regarding the same are expressly tVvverilt reserved. It is submitted under a confidential relationship for a specified purpose, and the recipient, by acccpling this document assumes custody and control and agrees (a) that this document will not be copied or reproduced in whole or in part, nor it contents ; revealed in any manner or to any person except to meet the pur- 7.4 The S Chip pose for which it was delivered, and (b) that any special features . re peculiar to this design will not be incorporated in other projects. 7.4.1 The S chip contains logic for the auxiliary register Z, exponents, and binary logic. It also contains the exponent register ‘and the master time-base generator. Two hard-wired inputs to the S chip cause the time-base to generate clocking for word lengths of 10, 12, 14, or 16 digits. The chip implements 250 equations and is approxi- matcly 140 by 160 tnils overall. ; 7.4.2 Specifically, the S chip: ° 9.4.2.1 Generates timing signals. 9.4.2.2 Contains a binary adder. 7.4.2.3 Contains seven bits of the Z register and logic for either left-shifting or right-shifting the contents of Z. : 7.4.2.4 Contains the eight-bit exponent registers associated with the operand registers X, Y, and Z, : ' a ms : 14, 2.5 Contains logic for decoding ROM and C chip commands. 94.8.6 Contains logic, for determining the condition of the Z register and outputting the status. 2 : ‘ 9.4.2.7 Generates the algebraic sign to be used by the decimal adder. 7.4.2.8 Generates a "power on" signal. 8. ROM Circuit(s) 8.1 The ROM circuitry implements the microprogram for the set of standard calcu- lator chips. In addition, the ROM contains the 4-phase clock for the caiculator. - -8.2 The ROM is available with three different capacities -~ 256, 384, or 512 words of 17 bits each. There may be as many as four micro instructions per word. 8.3 In a two-ROM configuration, ROM No. 1 would contain the 4-phase clock and the more "conventional" instructions. ROM No. 2 would be used to perform additional - functions such as sin, cos, or exponential operators. 4 9. Input/Output Chip(s) Depending upon requirements of the particular calculator. system, from one to four input/output interfacing chips are necessary. ; -10. Programmability rma. Additional dynamic storage is required to configure for a programmable calculator. From one to three additional chips are needed for this storage, depending upon the length of the program (number of instructions) and the type of instructions which are to be implemented. | of.each word. £2VVVG4* 32s 11. Register "xpandability 11.1 A "TT" chip may be substituted for the T chip, and with the addition of one or two "M" chips either eight or 16 independent full registers may be obtained. 11.2 The TT chip performs functions 5.2. 3, 5.2.4, and 5,2.5, listed earlier in these notes. The TY chip also performs register selection for l-of-16. 11.8 Each M chip contains eight memory registers, including decimal point and sign i 4 ee his document involves CONFIDENTIAL proprietary design rights of : North American Rockwell Corporation, and all designs, manufacturing; reproduction, use, and sale rights reaarding the same are expressly reserved. It is subinitted urder a confidential relationship for a specified purpose, end the recipient, by accepting this document assumes cuslody ard control and agrees (a) that this. document 10 will not be copied or repreduced in whale or in pad, nor it contents revealed in any manner or fo any person excep! lo mest the pur- pose for which it was delivered, and (b) that any special features peculiar to this design wll not be incorporated in other projects. . Pn St wee . ‘ ~ mt tag et ee, SOS S2PLI : ; 2 2 ok ; + = . i | og ® : ote \S i. . 4 e - ‘ ‘ ; 4 =i fl : « ge : ts ; F : 4 ® is : t * , “a : ; Me i} v2 ae £ ' i : = é be! 4 é ~. Le ji * ss ~"$ v 4 ; f st ‘ « % > { rs , ied - * “ 3 > ee 1 4 z a * : x . r j eho - pi? . a * a 7 ‘ ; f : 4 ; 8 “ ‘ : } c \ } ; Cine : \ 2 i eS aria a ‘ «< . oe ety . z “a r 4 * Stew ane pees. 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Example of a C-A-T-S sac | # Bae aie: Tees eine ee Po Calculator -- Implenented +“ 4 Arist hpaenienttn trae Ca poe 4-47 se d'or reproduced in whole'or in part or B coMOMRL So Nn gO EN sea ie ae PE 2 I: with One Set of NRYEC Standard manne to a erson except lo meet is Re a NM ie iRise A a ee paexec ' b wee delivered, and (by that any special features 00 Sis eee yt. giaee 2 ae C, A, T, and S Calculator esign will not be incorporated in other projects. fe ay Carey ee Nh aeaghe® 2 ar oeee fie ae" f : § Ase | Chips; One ROM Chip; and ara BR es is fo a oO ge ee % é ; g sch BD a pe *: Input/Output Interfacing i af, ” « i fs t ‘ 4 r . é ee y ot | : i ll ; ; nae ea Fie Rea WG Moca a ee Ae : tek ab ai j ; Sea : . as BSI Ser orca ree meepreree oe vat Peg: a ae sia PEE Me nd CAMO: ie SEE i RRO TT ’ i : ‘ , LYUIISE EL al pa ee : ; a a ’ ee 1,500 4:,002 . a 1,330 4,002 0.220___, | To Le , 0,980 4,002 - | £002 , Se ee gee | Pal oe _ one 0.090 : weet ~ (2 Plac ‘ #002 4 erty eye 0, 290—+ : BOTTOM oa FRAME Lb 0. 062 . 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It is ciksmilied water ie coabeantisl soldienkie be 4 : 0,004" MAX specified purpose, and the recipient, by accepting this document go 4 - Bssumes custody and control and ‘agrees (a) that this document ; 4 will not be copied or reproduced in whole or in part, nor it contents revealed in any manner or fo any person except to meet the pur- pose for which it was delivered, and (b) that any special features peculiar to this design will not.be incorporated in other projects. Figure 1, NRMIEC 42 LEAD FLAT PACKAGE IN LEAD FRAME AFTER S'TAGGER CUTTING OF LEADS 12 J