Manual / Guide · 1969
Singer Friden EC-1113 Service Manual (June 1969)
The 132-page service manual for the Hitachi-built EC-1113, with 108 HD700 PMOS chips and 12 Hitachi Nixies; some pages missing.
Manual / Guide · 1969
The 132-page service manual for the Hitachi-built EC-1113, with 108 HD700 PMOS chips and 12 Hitachi Nixies; some pages missing.
Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 1113 Friden ELECTRONIC CALCULATOR SERVICE MANUAL Friden FRIDEN INC - DIVISION OF THE SINGER COMPANY SAN LEANDRO- CALIFORNIA: 94577 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR CONTENTS SECTION 1 - GENERAL DESCRIPTION GENERAL. «ssc see wre nee SPECIFICATIONS. . “2s e © © © © @© © KEY FUNCTIONS... +s ceecccvee SECTION 2 - CALCULATING METHODS GENERAL... «es cceccesceeees ADDITION 6: 6 sine: so) 6 2 a SUBTRACTION .....2.2.2-. MULTIPLICATION ...... CONSTANT MULTIPLICAND. DIVISION 3.6 6 ccc es 0 ws CONSTANT DIVISOR..... SIGMA. ..2.-ccscccvcece INVOLUTION . 2.2.22. COMBINED CALCULATIONS. SECTION 3 - LOGIC ELEMENTS LOGIC CIRCUITS USED IN 1113 SHIFT REGISTER (HD701M).. INVERTER (HD703M)...... 4-INPUT AND GATE (HD704M). J-K FLIP FLOPS (HD705M). . . SHIFT REGISTER (HD707M).... 2-INPUT AND GATE; 3-INPUT AND GATES (HD712M) CIRCUITS COMPOSED OF DISCRETE COMPONENTS. SECTION 4 - LOGIC CIRCUITS GLOSSARY OF LOGIC FLIP FLOPS AND REGISTERS GENERAL. . 2... 220 Data Organization. ... Clock Pulse Generator . Bit Counters . 2... %% Digit Counter. ..... SHIFT REGISTERS .... Indicator Register (IR) . . Page ry CmoN OA F WON _ =" a fF FOND NH FF FH Pe PF ww WwW WwW He HY i TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR SECTION 4 - LOGIC CIRCUITS (Cont.) Accumulator Register (AR). .....eeee0esceeeeees Memory Register’ (MER)! «: 0 1a: x ici: wt center & BS BOR we HW FULL ADDER AND SUBTRACTER (FAS) .......2eeec0-8 Carry Fup Flop (CAF) i. eis cise cae eee wees Compensation. ».... eee eee enn v eee eeceuers Compensation Flip Flop (CDF). «ss 66% « «ees ee ae Block Compensation aes ciss wks evs Sie awi wees SPECIAL FAS GATES. ... 2c ccc een nccrnvvvseve EAS CRUIE TABLES. oc sce we Kew Re HERE RE WEG ADD OR SUBTRACT ONE (ASO) ss istic iienacinn i sa dae Ge ee a a MASTER FUNCTION FLIP FLOPS (J-K Type)......... CONDITIONAL CONTROL PHASE COUNTER .......0.. BNTRY CIRCUIT « sé & S63 4 AE BBW E Aow @ em 0 2 . DISPLAY CIRCUIT... cc cere nvevcccencvves SECTION 5 - ELECTRONIC CIRCUITS POWER SUPPLY ca bes i OS eee ewe Rwne we MASTER OSCILLATOR... 1.2.5.0 ee eve eeeeees DISPUAY CIRCUIT «0 nee kOe Be RS SERRE RW e SECTION 6 - FUNCTION LOGIC GUNA wre oe 6 we eK ES DEE See meeeeax ENTRY FUNCTION... 2. ce eeu e eevee ccceees ENTRY FLOW CHART ANALYSIS. .......0000c0e ist DIGIT SELECTION LOGIC (Figure 6-3) .......... 2nd DIGIT SELECTION LOGIC (Figure 6-4).......... ENTRY FLOW CHART (Figure 6-2) .............. ADD AND SUBTRACT. .......0.000c0ceecceae SAMPLE PROBEEM so: 6 6% 6 8 WKS WEE Be Kate en ADD AND SUBTRACT FLOW CHART ANALYSIS ....... ADD OR SUBTRACT (Basic Logic CC1)............ ADD OR SUBTRACT (Basic Logic CC2)............ ADD OR SUBTRACT (Basic Logic CC4)........... ADD OR SUBTRACT (Basic Logic CC5/CC7) ..... ADD OR SUBTRACT (Basic Logic CC6,SCF) ... ii ADD OR SUBTRACT (Basic Logic CC9)... TPA-169SL ‘J CH OAAaA A A AB ne ee wnwNHYYHNYDeH HO OO oo nr Oo oe Be Ll seo el ee ee oon noni po Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR SECTION 6 - FUNCTION LOGIC (Cont.) Page ADD OR SUBTRACT FLOW CHART (Figure 6-7) ........-..22. 21 MULT FLOW CHART ANALYSIS. « se #66 & we © S56 % la oS 24 MULTIPLY (Basie Logie CCOSCR), < @ « 66; & 6H DiS © Sek ee Ss 29 MULTIPLY (Basie Logic CC3 and CC9) ... cc ccc ccc wecee 30 MULTIPLY (Basic Logic CC4)....... ec eee evccvveevvvee = 381 MULTIPLY (Basie: Logie CCEiSCE)) «x: 6 ase 6 oe 6 06 BE Hie @ 32 MULTIPLY (Basic Logic CC6.SCF) . 2b 6 66s Ce eK K RRR 33 MULTIPLY (Basic Logic CC7). 2... sc cw cece erence vee 34 MUL EIR GY (Basie Doel CEB). 20:0: seine: @ ve ¥ wwe Le Ow GUO 35 MULTIPLY FLOW CHART (Figure 6-15), .. 1.2.2 c cc cceccvcve 37 DIVIDE FLOW CHART ANALYSES sc ec arece wes weaweewces 40 DIVIDE (Basle TGPIO GOT) soos 5 secs; we caytes eeca'% 6 OS & LS. © VOIR: B GaN % 45 DIVIDE (Basic LogiesCC2) « 6 4 ws & BNSF BLS F BE F OW % Ow Ses 46 DIVIDE (Basic Logie: CC) < o) a: Sie: 6 bene orse: 0 comer © ewe: © eye * wes e 47 DIVIDE (Basic Logie COG AC Re nw sie vena gehiel® Bike ® Wien mK cacen Ree & 48 DIVIDE (Basic Logic CCO.SCE). «esse is ee wes ees mesa s 49 DIVIDE (Basic Logie} OCT) « ws % <i & ae) © & IS) 6 HS: B OW KB OS E wie e 50 DIVIDE (Basic Logie:GCs) 5 a: & & 6 & 6 os HS Se HK Bein we oe 51 EVAIIS (BASIC CORIO .CODY oo. cox u: iw ce), 6; 3 sep 0: Je ew: 19 Kos & to Uw OB we cam we cw ® 52 DIVIDE FLOW CHART (Figurte'6*24). 6c secs ens eRe wa 53 OUTLINE OF FLOW IN SIGMA OPERATION. .....+6e+20-e¢ec0e08 55 BELOW CHART ANALYOIS 6 sig s sin 5 MiGs RSS MESHES MES We 55 SIGMAs Mss Me(Basio ORIG)... + » iene eee. cnr emes ance mse OF OUTLINE OF FLOW IN MEMORY PLUS OR MEMORY MINUS..... 58 SIGMA, MEMORY PLUS OR MEMORY MINUS FLOW CHART (Figure 6-33)59 MEMORY: RECALL KEY (MRB)\0. «eye 2 eee wee eee er eeeecwes GL REVERSE KEY AND MEMORY RECALL FLOW CHART (Figure 6-36). 62 RECALL MEMORY (Basic Logic) ...e.c.cc ccs ese ee be es owe 64 SHIT KEY: 6 is 5 & iS & WS © RG © Wil: BBWS SB OPS SWE SG oi % os ES Os 65 SHIFT KEY FLOW CHART (Figure 6-38). . 2... se ee cee eevee 66 CLEAR KEY (C) AND MEMORY CLEAR KEY (MC)........2... £67 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR SECTION 7 - MAINTENANCE DISASSEMBLY AND:ASSEMBLY ¢ 6 @ ie ett oie cei se wee ais INSPECTION PROCEDURE..... OPERATIONAL CHECK. ...... ee @ © © # © © © © ee TROUBLESHOOTING 6: 6 sence: © coy & mt ow) we WO 8 eo ee oe RADIUS TMEN Dic: wie: eae ST BS WU WO SIH WSS lle! @ wile W Hie PC BOARD #1..... coe eee COMPONENT IDENTIFICATION PC BOARD #1....6e00500006 PC BOARD #255 iw: @ ace: www 6 wo ° PC BOARD #4 (Type CD71). .... ef # © COMPONENT IDENTIFICATION PC BOARD #4 (Type CD71)..... . Fes I?) Oe CEE: esse: mee: wae @ em ow OS ee ae COMPONENT IDENTIFICATION PC BOARD #4 (Type CD79). ..... PESBORED Pils cow wie we we Gi MIR & ei HG & BIS) € SIS Be HGS © SECTION 8 - SERVICE LETTERS SECTION 9 - PARTS iv TPA-169SL Yo PMR HB SIN 12 13 14 15 16 17 18 19 20 21 22 23 26 6-20-69 GENERAL TOP COVER aa BOTTOM COVER Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR Section 1 GENERAL DESCRIPTION Page 1 ee HOOD DISPLAY KEYBOARD FIGURE 1-1 The 1113 Electronic Calculator (Figure 1-1) is a small, light weight, high speed portable desk calculator featuring: Nixie type, number indicating tube display, 10-key keyboard, and inte- grated (IC) electronic circuitry for long life and maximum reliability. SPECIFICATIONS Size: Weight: Keyboard: Decimal Point: Speed: Reliability: Power Source: Power Dissipation: Ambient Temperature: 11" wide, 14" deep, and 5" high (approx), 12 lbs. 10-key type. Any number can be entered (maximum of 12 digits) using the ten digit keys (0-9) and the Decimal Point key if applicable. The Function keys are arranged around the Digit keys in a manner that pro- vides maximum operator facility and ease of operation. Automatic decimal point alignment The longest arithmetic problem in: Addition and Subtraction 40 ms, Multiplication 73 ms. Division 80 ms, Use of the latest state of the art integrated circuit chips, transistors, and diodes insures maximum reliability and serviceability. The 1113 can be connected to any standard, grounded 115 VAC outlet, Transformer taps are provided for 110 or 117 VAC operation, Optional voltages are available on special order. 15 watts 0-40° C (32-104° F) TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 1 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 2 GENERAL DESCRIPTION KEY FUNCTIONS The Keyboard keys (Figure 1-2) can be grouped by function as: Digit, Arithmetic, and Data Handling. The Digit keys are used in entering numbers: the Arithmetic keys are used in oper- ations which involve computations; and the Data Handling keys shift numbers between regis- ters, or clear numbers from the machine, @ = MEMORY PLUS KEY SHIFT KEY | RECALL MEMORY KEY CLEAR : MEMORY MEMORY MINUS KEY KEY = MINUS EQUAL KEY = oN SIGMA KEY POWER - DIVIDE KEY Pwr : REVERSE KEY SN MULT KEY =—— PLUS EQUAL KEY DECIMAL POINT KEY CLEAR KEY ——/ \ j sae DIGIT KEYS (10) FIGURE 1-2 1, Digit Keys: Numbers are entered into the 1113 data loop digit-by-digit by use of the digit keys. Since numbers can contain decimal digits, the decimal point key is also considered to be in the digit group because it is used for a decimal number entry. 2. Arithmetic Keys: The arithmetic keys enable and initiate the arithmetic operations that will be performed with and on the numbers, Briefly their functions are: += (Plus Equal) Depression of this key initiates the addition, multiplication, and division functions, -= (Minus Equal) Depression of this key initiates the subtraction, multiplication, and divi- sion functions, X (Multiply) Depression of this key enables the multiplication function. Depression of the Plus Equal or Minus Equal key is necessary to initiate the multi- plication function, + (Divide) Depression of this key enables the division function, Depression of the Plus Equal or Minus Equal key is necessary to initiate the divide func- tion, M+ (Memory Plus) Depression of this key causes the number in IR to be added to the num- ber in MR, M~- (Memory Minus) Depression of this key causes the number inIR to be subtracted from the number in MR. = (Sigma) Depression of this key enables the automatic accumulation of products in MR when a multiply function occurs, This key is self locking and must be depressed prior to the multiplication, To release the key, it must be depressed again, TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 1 GENERAL DESCRIPTION Page 3 3. Data Handling Keys: Using the data handling keys results in the shifting of numbers be- tween registers: the shifting right of numbers in the indicator register (IR); the clearing of numbers from IR, AR, or MR; and the recall of numbers from the Memory Register. The function of the Data Handling Keys is: R (Reverse) Depression of this key exchanges the contents of IR and AR, RM (Recall Memory) Depression of this key recalls thecontents of the memory register (MR) to the indicator register (IR) without destroying the contents of MR, ) (Right Shift) Depression of this key results in the right shift of the number in the indicator register (IR) by one digit. C (Clear) Depression of this key clears the IR and the AR registers and restores the Function flip-flops to a reset condition. CM (Clear Memory) Depression of this key clears the memory register (MR). TPAI169-ST. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 2 CALCULATING METHODS Page 1 GENERAL This section of the manual describes the various calculating methods possible with the EC 1113 electronic calculator, While the operation of the 1113is basically simple and straightforward, certain aspects of the operation are different from the typical Friden machine. That is, after the initial digit entry in the 1113, the next key depression must be the desired arithmetic func- tion key (Mult (X), Divide (+), etc.); then the second digit entry is made and this entry is followed by the desired result key Plus equal (+=) or Minus equal (-=). The sample problems included will give the CSRep a working knowledge of the machine operation which is essential to understanding the machine logic and an aid in troubleshooting. Listed below are several pertinent points that must be observed in the operation of the 1113 Electronic Calculator, 1, This calculator has an automatic decimal point alignment system, 2, When answers of subtraction are minus, they are indicated with a minus sign, 3, In the following instances, the overflow indicator lamp glows to indicate that an answer or an entry number exceeds the capacity of any register. a. When the entry number exceeds 12 digits or 11 decimal places, In any arithmetic function when the answer exceeds 12 digits (whole number plus deci- mal number). c, In multiplication when the sum of the digits in the multiplicand and the multiplier exceeds 12 digits. d. In division when the dividend or divisor exceeds 11 digits, e. When the contents of MR exceeds 12 digits, 4, The numbers recalled by depressing the reverse key [R] or recall memory key must be followed by one of the function keys [-=] [x] =] prior to the next entry. TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 2 CALCULATING METHODS ADDITION Addition is accurate up to 12 digits. Depressing the Clear key is necessary before each cal- culation, PROBLEMS: 1. Addition without Decimals ..... 946 + 538 = 1484 2. Addition with Decimals ..... wes 2.63 + 0.574 = 3.204 3. Chain Addition ................ 946 + 2.63 + 0.574 = 949.204 INDEX IN TOUCH CONTROL SOLUTION KEYBOARD | KEYS IN SEQUENCE | REMARKS 1. 946 + 538 = 1484 c] 946 H 538 ia 1484 2. 2.63 + 0.574 = 3.204 F] 2.63 574 3,204 3. 94642. 6340.574=949. 204 946 Aa 2.63 C= 948. 63 574 FS 949. 204 T PA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR CALCULATING METHODS SUBTRACTION Subtraction is accurate up to 12 digits. Depressing the Clear key is necessary before each calculation. PROBLEMS : 1. Subtraction without Decimals 2. Subtraction and Addition 3. Subtraction with True Credit Balance ee | Section 2 Page 3 657 - 492 = 165 -530 + 829 = 299 eperoveievere 139 - 567 = -428 SOLUTION KEYBOARD | Keys tw sequence | REMARKS 1. 657 - 492 = 165 al 657 Fy 492 Bq a 2, -530 + 829 = 299 a 530 FS 829 I 299 3. 139 - 567 = -428 139 ; 567 i. ~428 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR Page 4 CALCULATING METHODS MULTIPLICATION Multiplication is accurate up to 12 digits, if the total of the multiplicand and the multiplier does not exceed 12 digits. In multiplication depressing the Clear key is not necessary before each calculation. In chain multiplication, if the number of digits in the product added to the number of digits in the next multiplier exceeds 12, remove the least significant digits from the product by use of the Shift key. PROBLEMS : 1. Multiplication without Decimals . 2. Multiplication with Decimals ....... 3. Chain Multiplication ... . 12 x 24 = 288 6.14 x 87.2 = 535.408 369 x 682 x 34 = 8556372 1. 12 x 24 = 288 12 | 24 H- = 288 2. 6.14x 87.2 = 535.408 6.14 Pe | 87.2 Z 535.408 3. 369 x 682 = 251658 369 EF] 682 +4 251658 251658 x 34 = 8556372 x | 34 +4 8556372 TPA-14AQ8T. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 2 CALCULATING METHODS Page 5 CONSTANT MULTIPLICAND A multiplication problem using a constant multiplicand can be accomplished with or with- out using memory as follows: PROBLEMS : 359.83 x 514 = 184952.62 359.83 x 45.36 = 16321.8888 ; INDEX IN TOUCH CONTROL BOLUETON KEY BOARD KEYS IN SEQUENCE REMARKS a) Not using memory 359.83 x 514 = 184952.62 359.83 [x | 514 184952. 62 359.83 x 45.36 = 16321,.8888 [R | 359.83 45.36 16321.8888 b) Using memory. 359.83x 514 = 184952.62 359.83 514 184952. 62 359.83 x 45.36 = 16321.8888 [Rm] 359.83 45.36 16321.8888 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR Page 6 CALCULATING METHODS DIVISION Division is accurate if the dividend or divisor does not exceed 11 digits. The number of digits in the quotient will equal 12 digits minus the number of digits in the divisor. Jn division, depressing the Clear key is not necessary before each calculation. PROBLEMS : 1. Division without Decimals ... 2. Division with Decimals ...... 3. Ohatn Division osu acca. ager sees 145 + 12 = 12.08333333 6-20-69 4962.184 + 13.2 = 375.923030 759 + 153-456 = 0.01087891 SOLUTION KEYROARD | Keys oN sequence | _ REMARKS 1. 145412 = 12.08333333 145 12 12.08333333 2, 4962.184+13.2=375.923030 | 4962.184 13.2 375.923030 3. 7592153 = 4.96078431 759 fF] 153 +4 496078431 4,960784312456=0.01087891 [= 456 0.01087891 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 2 CALCULATING METHODS Page 7 CONSTANT DIVISOR A division problem using a constant divisor can be accomplished with or without using memory as follows: PROBLEMS : 297-+-1364 = 0.2177419 64281364 = 4.7126099 SOLUTION meveoann | xevs Im seovence | REMARKS a) Not using memory. 29721364 = 0.2177419 297 [=] 1364 0.2177419 642871364 = 4.7126099 R | 1364 [| 6428 r | 1364 4..7126099 b) Using memory. 2971364 = 0.2177419 1364 297 [=] [ro] 1364 0.2177419 642841364 = 4.7126099 6428 fal [rm] 1364 4.726099 TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 8 CALCULATING METHODS SIGMA The Sigma key is used for accumulating positive or negative products to Memory automati- cally. Once depressed, the Sigma key will remain depressed until it is depressed a second time, PROBLEMS ; 1. (8.25 x 593) + (186 x 734) - (2.93 x 326) = 140461.07 INDEX IN| TOUCH CONTROL . siti KEYBOARD | KEYS IN SEQUENCE — 1. 8.25 x 593 = 4892.25 8.25 = 593 +5 4892.25 186x734=136524.00 186 x 734 eal 136524.00 -(2.93 x 326) = -955.18 2.93 x 326 -5 -955.18 * = Accumulated Answer: 140461.07 RM 140461.07 * Indicates subtraction from accumulated product. TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 2 CALCULATING METHODS Page 9 SIGMA (Cont.) 2. 589 + 610 + (274 x 916) - (59 x 1037) = 191000 3. (26040+28) + (153 x 842) = 129756.000000 SOLuTen INDEX IN TOUCH CONTROL REMARKS KEYBOARD | KEYS IN SEQUENCE 2. 589 +610 + (274x916) - (59 x 1037) = 191000 589 610 fe 274 fe | 916 250984 ae 1037 - -61183 191000 [am] 191000 3. 26040+28 = 930.000000 26040 [=] 930.000000 153x842=128826.000000 153 Fe | 842 128826.000000 Accumulated Answer: 129756.000000 [RM] 129756.000000 TDA-14Q2ET. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 10 CALCULATING METHODS INVOLUTION The process of raising a number to a higher power is indicated in the following problems. PROBLEMS : 1. 123% = 15129 2. 1239 = 1860867 3. 123% = 228886641 SeLErON INDEX IN TOUCH CONTROL soiuieys KEYBOARD | KEYS IN SEQUENCE 1. 1232 = 15129 c | |__| 123 co +5 15129 |__| C 2. 1239 = 1860867 123 [x | +- = 15129 ik | 123 Fs 1860867 a 3. 123% = 228886641 123 FE | 15129 228886641 TDA.14e0cT Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 2 CALCULATING METHODS Page 11 COMBINED CALCULATIONS Examples of combined calculations are shown in the four problems that follow. PROBLEM: 1. 1.23 + (1.23 *% 456) = 562.11 174 + a To2 shied ; ar = 0.882352941 1, 1.23+ (1.23 x 456) = 562.11 5 1.23 fe | 456 = 560.88 R | 1.23 | 562.11 he 174 + Se 102 a = 1.47416413 174 f= 53 rm 227 102 — 329 485 [=] R | 329 Hea 1.47416413 3. 5 a = 0.882352941 a 2 + =| 15 a 17 *R | 15 [=] R | 17 [+ 0.882352941 * This saves a manual entry of 15. TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 Section 2 FRIDEN 1113 ELECTRONIC CALCULATOR Page 12 CALCULATING METHODS COMBINED CALCULATIONS (Cont.) 4. (28.8 x 384 + 7.68 x 192) x 1.2 x 32 = 481296.384 INDEX IN TOUCH CONTROL LUTTE KEYBOARD | KEYS IN SEQUENCE smuenn 4, 28.8 x 384 = 11059.2 28.8 fe | 384 11059.2 7.68 x 192 = 1474.56 7.68 fe | 192 1474.56 (11059. 200041474. 56000) [RM] 12533.76 x 1.2 x 32 = 481296.384 fe | Le 15040.512 32 481296. 384 TPA-169SL i. 6-20-69 Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR LOGIC ELEMENTS LOGIC CIRCUITS USED IN THE EC 1113 Section 3 Page 1 Listed in the Table, Figure 3-1, are the 6 types of IC’s and their circuit functions in the EC 1113 Calculator. In addition to the IC circuits, discrete circuits are used for Inverters, OR gates, and Emitter Followers. Each circuit (IC and discrete) is described briefly in the following paragraphs. volt clock pulses for proper operation.) Type of IC Circuit Function No. of circuits HD701M Dual 8-bit dynamic shift Two 8-bit shift registers register HD703M Four inverters Four inverter circuits HD704™M Dual 4-input AND (OR) gate Two 4-input AND gate circuits HD705M Dual J-K flip-flop Two J-K flip-flop circuits HD707M 4-bit shift register Four D type flip flops (One 4-bit shift register) HD712M Dual 2-input AND (OR) gate Two 2-input AND gate circuits Single 3-input AND (OR) One 3-input AND gate gate circuit FIGURE 3-1 TT Vn ia a aa aay aes a a a a i 1 ' ' ' ‘ ! 1 ' ' ' ! ' ' 1 ' i} ' ' ' ourpur | | o +++ ' 4st OF 16 SHIFTS INPUT TO NEXT REGISTER PLOT OF ONE BIT OF INFORMATION ONLY FIGURE 3-2 1. Shift Register (HD701M) (NOTE: All J-K flip flops and Shift Register IC’s require -24 OUTPUT 169-3 srapes| ag oO H— OUTPUT SHIFT REGIST This IC comprises two 8-bit Shift Registers externally connected to form an equivalent 16-bit Shift Register having a BCD capacity of 4 digits. Each register (IR, AR, and MR) will there- fore require 3 HD701M IC chips for a 12 digit capacity. Data is dynamically circulated in the register controlled by the clock pulses CP1 and CP2 as shown in Figure 3-2, Note on the tim- ing diagram that 16 CP1 andCP2pulses are needed to shift one bit of data through the register, TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 3 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 2 LOGIC ELEMENTS INVERTER FIGURE 3-3 2. Inverter (HD703M) This IC comprises four Inverter Circuits with each Inverter operating independently. Logi- cally, it is a NOT circuit used only to invert logic signals. The IC chip with 4 inverters is shown symbolically in Figure 3-3. 1 ‘ Input en 1 Input Output ! 0 | ar} a2} ci | 1 Input <A2 ] 0 0 0 1 | 0 0 1 0 1 1/10 0 Output Cl | | 4 4 i 0 1/1 1 Input Al A2 A383 A4 Bl B2 BB B4 Input A1-A2-A3-A4 _ i Output | c1-c2-c3-c4. | 1/0 “a AND GATE FIGURE 3-4 3. 4-Input AND Gate (HD704M) This IC comprises a pair of AND gate circuits, each provided with four inputs, and with each circuit operating independently. The number of inputs used can vary from 2 to 4 depending on the circuit requirements. The IC chip is shown symbolically in Figure 3-4, along with a truth table and input output pulses based on using only 2 inputs. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 3 LOGIC ELEMENTS Page 3 ov a Clock 1(CP1) mi lol oe i ee eee Clock 2 (CP2) be L] | || L| L| = ] | | 1 | 1 | J;Input | LY | y L : K;Input , oe! ee meee ARR! PNR (| | SRNL | URES (ey ;inpu | a chi ji k 1 <1 J2 K2 ‘CP2 Q:Output 0 | | Input Output J K Q (Set Side) 1 1 No Action 1 0 0 (Reset) 0 1 1 (Set) 0 0 Toggle ov | | | | | ToT eet | “woe , TF Lir til a ee | 1 Input Input FIGURE 3-5 4, JK Flip Flop (HD705M) This IC comprises a pair of J-K FF with each circuit operating independently. However, as shown in Figure 3-5, the clock pulses are common to both flip-flops. In the counter circuits, the J and K terminals are connected together allowing the FF to toggle on each negative in- put pulse. Note: The J-K (master-slave) FF’s used in the 1113 operate on negative logic. That is, the permiss inputs (J or K) must be at -14 volts (logic 0) at the same time the -24 volt clock pulse CPI arrives to set the master FF. Then, when the -24 V CP2 pulse arrives, it will set the slave and the output of the FF will reflect a change of state. Likewise, if the permiss inputs (J-K) are tied together, the FF will toggle in step with the negative input pulses. mma aan Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 3 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 4 LOGIC ELEMENTS c4 cate mg INPUT “a OUTPUTS | ae | = | a | —— | ba SHIFT REGISTER cock ery TT nee Input (1) Output (C1) FIGURE 3-6 5. Shift Register (HD707M) This IC comprises 4 D type FF’s used for the preceding and succeeding stages of the two 14- digit shift registers IR and AR; thereby, constituting IR 14, IR 1, AR 14 and AR 1. It is also used as MR 1 following the MR register. The IC chip with its 4 D type FF’s and its input out- put signals is shown in Figure 3-6, 1 Output D1 Input (C1) | | | 0 |_| . Input (C2) | | | 0 | Li 1 Input (C3) | 0 | Input Al A2 Bl B2 C1 C2 C83 Output (F1) PL 0 it FIGURE 3-7 6, 2-Input AND and 3-Input AND gates (HD712M) This IC is similar to HD704M except for its number of inputs and gate circuits. That is, two 2-Input AND gates and one 3-Input AND gate circuits are integrated in one module. Relation- ship between signal input and output is also identical to that described in item 3. The IC chip with its signal relationships is shown in Figure 3-7. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 3 LOGIC ELEMENTS Page 5 -24V Input 1 Output Input 2 Output Input 7 -30V -14V Input Output -24V FIGURE 3-8 7. Circuits Composed of Discrete Components The 1113 uses three basic electronic circuits composed of discrete components as shown in Figure 3-8, They are: Inverters, OR gates, and Emitter Followers, T PA-169SL 6-20-69 Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR Section 4 LOGIC CIRCUITS LOGIC CIRCUITS GLOSSARY OF LOGIC FLIP FLOPS AND REGISTERS Symbol AR ASF ASO BCF CAF CCF CDF DC DIF DIF FAS FASx FASy IR ISF KEF MIF MLF aor nre onrnr mre Name Accumulator Register Accumulator Register Sign FF Add or Subtract One Boundary Code FF Carry FF Conditional Control Phase Counter Compensation FF Digit Counter Divide FF Bit Counter Full Adder and Subtracter “X” input to FAS “vy” input to FAS Indicator Register Indicator Sign FF Key FF Memory In FF Mult FF Function Contains one of the factors in an arithmetic function and accumulates the intermediate an- swers, Indicates the sign of the number in AR, Adds or subtracts “1” from decimal point or shift information in IR. Used in various logic functions and it enters the boundary code in Mult and Divide, Indicates a carry or borrow in the arithmetic function being performed, Divides the arithmetic functions into 10 phases (CCO through CC9), Enables a compensation during arithmetic func- tion, Provides signals called digit times. Enables the Divide function. Provides timing signals called Bit times, Performs additions and subtractions necessary in the arithmetic functions. AR input to FAS. IR input to FAS. Contains one of the factors in an arithmetic function and stores the final answer for display, Indicates the sign of the number in IR. Allows only one operation to occur for each key depression of; Entry, Right Shift, and Reverse. Enables an addition or subtraction from memory. Enables the Mult function, MAMA TAAT Section 4 Symbol MR MSF OSF OVF OVF-1 POF RDF SCF MnrA PLAT Courtesy the Old Calculator Museum http://oldcalculatormuseum.com FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 LOGIC CIRCUITS Name Memory Register Memory Sign FF Operation Start FF Overflow FF Overflow FF Plus or Minus One FF Decimal Point FF Register Detect FF Shift Control FF Function Storage register for various arithmetic pur- poses, Indicates the sign of the number in Memory. Starts all functions, Indicates an overflow condition, Used in conjunction with the OVF FF to detect an overflow condition in a mult operation. Used with ASO to add or subtract “1” from decimal point and shift information, Indicates a decimal point entry, It is also used as a control FF in arithmetic functions, Enables a series of additions or subtractions. Controls Shifting of IR and AR. Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 4 LOGIC CIRCUITS Page 1 GENERAL In this section are explanations of the logic circuits and basic machine circuits that are used extensively in the Function Logic. The explanations are designed to give the basic operation of these circuits so that in the Function Logic discussions they need only be referred to. Also included are: A glossary of logic flip flops and registers, logic symbols used in the 1113, and a block diagram (Figure 4-1) indicating the data flow through the registers and associated circuits. NOTE: The EC 1113 uses positive logic with logic 1 = “0” volts and logic *0” = -14 volts. However, all clock pulses are -24 volts and are not considered a logic level. The reason for the -24 volt clock pulses is due to the internal construction of the IC chips (modules) used in this machine. BCD INDICATES CONTROL KEYBOARD c c GATES BCD MR IR43 IR2 IR AR IR44 INDICATOR REGISTER 1R4 IR x = R IR c aso eo! c DISPLAY -— COMPENSATION IR AR | x AR14 FAS ARIS AR2 poe ¢ LAR Ba F 5 AR14 [———$] ACCUMULATOR REGISTER R Y A | s FAS AR AR me a MR13, MR2 wile ee tg. MEMORY REGISTER MR MR c CONTROL FF CONDITION FF CLOCK PULSE GENERATOR ENTRY CIRCUIT TIMING CIRCUITS POWER SUPPLY aad BLOCK DIAGRAM FIGURE 4-1 Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 4 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 2 LOGIC CIRCUITS TIMING Timing circuits supply the clock pulses and timing signals for controlling all operations of the machine, These circuits consist of: Master Oscillator, Clock Pulse Generator, Bit Counter, and Digit Counter. The Clock Pulses derived from the Master Oscillator are CP1 and CP2; while the Clock Pulse Generator supplies seven other Clock Pulses designated: AR14CP1, ARCP1, IRCP1, MRCP1, DFCP1, CCCP1, and CFCP1. Unlike the logic signal levels at “0” volts and -14 volts, the Clock Pulse levels are at “0” volts and -24 volts, Data Organization Data flow in the 1113 is dynamic and serial in the form of binary coded decimal (BCD) infor- mation, Data is organized into: Bit times; Digit times; and Column times as shown in the Timing Chart, Figure 4-2, 4 DATA PASS (COLUMN TIME) 2.88 ms (APPROX.) LOT® | O71 | OT2 | OTS | OT4| OTS | OTE | DTT | DTS | OTS |DT10) DT 44) DT12) DT 43) DT 14) | | | | if | J L i | i} | 1 | | L Z “ an gr i 7 ‘ a“ “ at “ m wt ie a“ 7a ge DIGIT TIME Beg ae . a NL van DTF DTF . (ere i eye ere | ets | Bt | BT2 | BT4 ave | | | 1 | 124y8 | +——— 96ps - 96ps | I ! : —_ A92p8 —| | cpa! \ ' ! : i) ' 16us | ft 24 psm ' ' A169- 44 1 Column Time 2,88 ms CP1 Pulse Width 4 us 1 Digit Time 192 us CP2 Pulse Repetition 1 DTF Time 96 us Rate 24 us 1 Bit Time 24 us CP2 Pulse Width 6 us CP1 Pulse Repetition Osc, Frequency 42 KHz Rate 24 us NOTE: These values are approximate and will vary from machine to machine, FIGURE 4-2 Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 4 LOGIC CIRCUITS Page 3 Master Oscillator, The basic timing is produced by a free running astable (unsymmetrical) multivibrator, operating at a frequency of 42 KHz, The two outputs of this multivibrator are fed to Inverter circuits which shape the outputs and produce clock pulses designated CP1 and CP2, These clock pulses occur every 24 microseconds, but at different time intervals and with different pulse widths, They are used with other timing signals for controlling the logic operation of the machine, A detailed description of the astable multivibrator is covered in the Friden Correspondence Lesson #19. The added circuitry for controlling the wave shaping is described in Section 5 (Electronic Circuits). Clock Pulse Generator. The seven output signals from the Clock Pulse Generator occur at the same time as the CP1 (Master Oscillator) but are controlled by the timing counters and other logic signals via logic gates. Being clock pulses, they are at a “0” volt to -24 volt level and are used for controlling the shift registers and the J-K flip flops. Bit Counter, The Bit Counter consists of 3J-K Flip Flops (scale of 8, pure binary, up counter) controlled by the clock pulses CP1 and CP2 from the Master Oscillator, Its purpose, in con- junction with the Digit Counter is to provide the basic machine timing. The outputs of the J-K Flip Flops are decoded via logic gates to provide repetitive sequential bit counts (BT1, BT2, BT4, and BT8) at 24 microsecond intervals which is the time alloted to the CP1 and CP2 clock pulses. During the first four counts (96 microseconds) the logic signal DTF is produced via the Bit Counter logic gates to indicate the first half of a digit time. Then, during the second four-bit-counts, DTF is produced to indicate the second half of a digit time, A complete digit time then, consists of 8 bit times or 192 microseconds, The first four bits of a digit time, when the signal DTF is true, are used for shifting data in the registers, During the second half of a digit time, shifting is stopped and this period is used for the arithmetic compensa- tion required in the Full Adder and Subtracter (FAS), Shown in Figure 4-3 is a Bit Counter Truth Table showing the state of the DTF FF’s as the count progresses through 8 bit times, picit| ) DC-8|DC-4|DC-2/DC-1| pares 0 6 -o |e DTO BIT 0 0 0 1 DT1 One DER POR! Pel sare oe po a fe pr Complete 0 0 0 BT1 0 0 1 1 DT3 Count of 0 0 1 BT2 DIF 0 1 0 0 DT4 Digit Counter 0 1 0 BT4 smests 0 i 0 1 DT5 = 2.88 ms. 0 1 1 BT8 rls 0 1 I 0 DT6 1 0 0 BT1 ae a oe DT7 (1 Column 1 0 1 BT2 ee es ae | 0 0 0 DT8 Time) 1 1 0 BT4 1 0 | 0 1 DT9 1 1 1 BT8 I 0 I 0 DT10 i i: 0 1 i DT11 1 1 0 0 DTi2 BIT COUNTER TRUTH TABLE i tt STS FIGURE 4-3 1 1 1 0 DTi4| i) DIGIT COUNTER TRUTH TABLE FIGURE 4-4 Digit Counter, The timing of the machine requires 15 digit times in order to complete one data pass through the registers, The 15 digit times (DTO through DT14) make up one column time which occurs each 2,88 milliseconds, No shifting occurs during DT14 which is considered as “home” time, Digit times are generated by the four J-K flip flops that make up the Digit Counter. The Digit Counter being controlled by the two clock pulses CP1 and CP2, and by the Bit Counter; can only advance one step on each complete count of the Bit Counter. As the Digit Counter reaches DT14, a permutation occurs to step it to DTO, In Figure 4-4, is shown the Digit Counter Truth Table showing a count of 15 digit times. TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com Section 4 FRIDEN 1113 ELECTRONIC CALCULATOR 6-20-69 Page 4 LOGIC CIRCUITS SHIFT REGISTERS The EC 11138 has three Shift Registers designated: Indicator Register (IR), Accumulator Register (AR), and Memory Register (MR). These registers are composed of IC flip flops designed for storing numbers in a Binary Coded Decimal (BCD) system, This Binary Coded Decimal information is kept circulating through the registers in a dynamic unidirectional flow. That is, regardless of operating conditions (calculating or not calculating), clock pulses are continuously supplied to the registers so that information is always circulating in a serial bit by bit one direction flow, At timed intervals, the contents of the registers can be sampled for display or other uses, but the dynamic data flow continues uninterrupted under control of the clock pulses, Indicator Register (IR), The Indicator Register (IR) is composed of a 14 digit shift register with each digit occupying a specific position in relation to time, That is, at a specific time when shifting is stopped momentarily (home time), each digit will have a specific register position designated: [R14 (shift information); IR13 through IR2 (contains the digits 1 through 12 for display in the number indicating tubes); and IR1 (contains decimal point information), At any other time, dynamic data flow keeps the data circulating out IR1 and into IR14, there- fore, data cannot be identified during this time. Accumulator Register (AR), The Accumulator Register (AR) is also composed of a 14 digit shift register whose digit positions in relation to time are designated: AR14 (Control infor- mation); AR13 through AR2 (digits 1 through 12); and AR1 (decimal point information), The registers AR13 through AR2 are used for storing the results of the arithmetic calculations developed in the Full Adder and Subtracter (FAS). Memory Register (MR). The Memory Register (MR) is composed of a 13 digit shift register whose digit positions in relation to time are designated: MR13 through MR2 are used for dy- namic storage of 12 digits, and MR1 is used for decimal point information, FULL ADDER AND SUBTRACTER (FAS) The Full Adder and Subtracter (FAS) consists of a group of logic gates designed to perform the binary addition and subtraction operations required by the arithmetic functions of: Add, Subtract, Multiply, and Divide, The two registers “IR” and “AR” (Indicator Register and Ac- cumulator Register) are used as the inputs to FAS (y and x) with the contents of IR normally being added to, or subtracted from, the contents of AR as required by the arithmetic function being performed. The answers are accumulated in AR and then IR and AR exchange contents and the final answer appears in IR. Data flow into and out of FAS is strictly serial in form and consists of the binary bits “0” and “1” associated with the bit times BT1, 2,4, and 8 as binary coded decimal (BCD) information, As previously described each digit time is divided into two equal parts with each part consist- ing of four bit times designated BT1, 2, 4, and 8, The first half of a digit time is designated DTF and lasts for four bit times, The second half of a digit time is designated DTF and it too lasts for four bit times, In DTF time (1st half), the normal binary addition or subtraction in FAS occurs, In DTF time (2nd half), acompensation (correction) factor is applied to the output of FAS as required tocorrect BCDdigits greater than “9”, (See explanation of “Compensation” on following pages.) Output of FAS is simultaneous with the Input so no time is consumed in performing the binary arithmetic or the compensation. The function of Adding or Subtracting in FAS is accomplished by means of a group of logic AND gates; a Carry Flip Flop (CAF); and a Compensation Flip Flop (CDF), The normal AR input to FAS is designated FAS(X) and the IR input to FAS is designated FAS(Y). A Carry is ee “C”, The Basic FAS Logic Gates and Carry Flip Flop (CAF) are shown in Figure -5. In any arithmetic function of FAS, the data pass occurring in DTO through DT13 time causes the BCD contents of AR and IR to shift serially into the FAS inputs via logic gates 99, 104, and 111, The output of FAS (X and Y) in combination with the output of the CAF FF (CAF or TPA-169SL Courtesy the Old Calculator Museum http://oldcalculatormuseum.com 6-20-69 FRIDEN 1113 ELECTRONIC CALCULATOR Section 4 LOGIC CIRCUITS Page 5 CAF) is then decoded via AND gates 114, 115, 116, 117, and 118 to determine the binary sum or difference. A FAS truth table (Figure 4-10) is used to indicate the possible input/output combinations of the FAS circuit, DTF*BT1 — tq Xr OTE 84 i—_— x § Sf 4196 x ¥+ CRF CAF x 5 ‘ 446 K+ y- CAF ‘is CAF x + . Hear: ae XY CAF car — ‘in KeYeCaFs OTF+8T1 e | ah <ixi LL ce] 4 7 + o 4 OTF*BT1 CDF | 8 ) cP41 BTs AOD % cp2 = 92 OTF + 6Ta-OT14 — } > suBst -—— ¥ —] 93 OTF+578-0T1a — FIGURE 4-5 Carry Flip Flop (CAF) The Carry Flip Flop (CAF) is used in conjunction with the Full Adder and Subtracter (FAS) to provide the necess